EPM7160ELC84-20 Altera, EPM7160ELC84-20 Datasheet - Page 2

IC MAX 7000 CPLD 160 84-PLCC

EPM7160ELC84-20

Manufacturer Part Number
EPM7160ELC84-20
Description
IC MAX 7000 CPLD 160 84-PLCC
Manufacturer
Altera
Series
MAX® 7000r
Datasheet

Specifications of EPM7160ELC84-20

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
20.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
10
Number Of Macrocells
160
Number Of Gates
3200
Number Of I /o
64
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
84-PLCC
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
10
Family Name
MAX 7000
# Macrocells
160
Number Of Usable Gates
3200
Frequency (max)
83.33MHz
Propagation Delay Time
20ns
Number Of Logic Blocks/elements
10
# I/os (max)
64
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
84
Package Type
PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2337-5

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MAX 7000 Programmable Logic Device Family Data Sheet
...and More
Features
2
Usable gates
Macrocells
Logic array
blocks
Maximum
user I/O pins
t
t
t
t
f
PD
SU
FSU
CO1
CNT
Table 2. MAX 7000S Device Features
Feature
(ns)
(ns)
(ns)
(MHz)
(ns)
EPM7032S
175.4
600
2.9
2.5
3.2
32
36
2
5
EPM7064S
Open-drain output option in MAX 7000S devices
Programmable macrocell flipflops with individual clear, preset,
clock, and clock enable controls
Programmable power-saving mode for a reduction of over 50% in
each macrocell
Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
44 to 208 pins available in plastic J-lead chip carrier (PLCC), ceramic
pin-grid array (PGA), plastic quad flat pack (PQFP), power quad flat
pack (RQFP), and 1.0-mm thin quad flat pack (TQFP) packages
Programmable security bit for protection of proprietary designs
3.3-V or 5.0-V operation
Enhanced features available in MAX 7000E and MAX 7000S devices
Software design support and automatic place-and-route provided by
Altera’s development system for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
1,250
175.4
2.9
2.5
3.2
64
68
4
5
MultiVolt
interface with 3.3-V or 5.0-V devices (MultiVolt I/O operation is
not available in 44-pin packages)
Pin compatible with low-voltage MAX 7000A and MAX 7000B
devices
Six pin- or logic-driven output enable signals
Two global clock signals with optional inversion
Enhanced interconnect resources for improved routability
Fast input setup times provided by a dedicated path from I/O
pin to macrocell registers
Programmable output slew-rate control
EPM7128S
TM
2,500
147.1
128
100
I/O interface operation, allowing devices to
3.4
2.5
8
6
4
EPM7160S
3,200
149.3
160
104
3.4
2.5
3.9
10
6
EPM7192S
3,750
125.0
192
124
7.5
4.1
4.7
12
3
Altera Corporation
EPM7256S
5,000
128.2
256
164
7.5
3.9
4.7
16
3

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