EPM7256SQC208-7N Altera, EPM7256SQC208-7N Datasheet - Page 7

IC MAX 7000 CPLD 256 208-PQFP

EPM7256SQC208-7N

Manufacturer Part Number
EPM7256SQC208-7N
Description
IC MAX 7000 CPLD 256 208-PQFP
Manufacturer
Altera
Series
MAX® 7000r
Datasheet

Specifications of EPM7256SQC208-7N

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
256
Number Of Gates
5000
Number Of I /o
164
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
208-MQFP, 208-PQFP
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
16
Family Name
MAX 7000S
# Macrocells
256
Number Of Usable Gates
5000
Frequency (max)
166.7MHz
Propagation Delay Time
7.5ns
Number Of Logic Blocks/elements
16
# I/os (max)
164
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2066
EPM7256SQC208-7N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7256SQC208-7N
Manufacturer:
ALTERA
Quantity:
173
Part Number:
EPM7256SQC208-7N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EPM7256SQC208-7N
Manufacturer:
ALTERA
0
Figure 1. EPM7032, EPM7064 & EPM7096 Device Block Diagram
Altera Corporation
INPUT/GLCK1
INPUT/GCLRn
INPUT/OE1
INPUT/OE2
8 to 16
I/O pins
8 to 16
I/O pins
Control
Control
Block
Block
I/O
I/O
8 to 16
8 to 16
LAB A
LAB C
The MAX 7000 architecture includes four dedicated inputs that can
be used as general-purpose inputs or as high-speed, global control
signals (clock, clear, and two output enable signals) for each
macrocell and I/O pin.
EPM7064, and EPM7096 devices.
Macrocells
Macrocells
33 to 48
1 to 16
8 to 16
8 to 16
16
16
MAX 7000 Programmable Logic Device Family Data Sheet
36
36
PIA
Figure 1
36
36
16
8 to 16
16
8 to 16
Macrocells
Macrocells
shows the architecture of EPM7032,
17 to 32
49 to 64
LAB B
LAB D
8 to 16
8 to 16
Control
Control
Block
Block
I/O
I/O
8 to 16
I/O pins
8 to 16
I/O pins
7

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