EPM7256AETI144-7 Altera, EPM7256AETI144-7 Datasheet - Page 3
![IC MAX 7000 CPLD 256 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EPM7256AETI144-7
Manufacturer Part Number
EPM7256AETI144-7
Description
IC MAX 7000 CPLD 256 144-TQFP
Manufacturer
Altera
Series
MAX® 7000Ar
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7256AETI144-7
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
256
Number Of Gates
5000
Number Of I /o
120
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Voltage
3.3V
Memory Type
EEPROM
Number Of Logic Elements/cells
16
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2062
EPM7256AETI144-7
EPM7256AETI144-7
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Altera Corporation
General
Description
MAX 7000A (including MAX 7000AE) devices are high-density, high-
performance devices based on Altera’s second-generation MAX
architecture. Fabricated with advanced CMOS technology, the EEPROM-
based MAX 7000A devices operate with a 3.3-V supply voltage and
provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns,
and counter speeds of up to 227.3 MHz. MAX 7000A devices in the -4, -5,
-6, -7, and some -10 speed grades are compatible with the timing
requirements for 33 MHz operation of the PCI Special Interest Group (PCI
SIG) PCI Local Bus Specification, Revision 2.2. See
Table 2. MAX 7000A Speed Grades
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
Software design support and automatic place-and-route provided by
Altera’s development systems for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, Synplicity, and VeriBest
Programming support with Altera’s Master Programming Unit
(MPU), MasterBlaster
communications cable, ByteBlasterMV
cable, and BitBlaster
programming hardware from third-party manufacturers and any
Jam
Format File- (.svf) capable in-circuit tester
Device
TM
STAPL File (.jam), Jam Byte-Code File (.jbc), or Serial Vector
v
v
-4
MAX 7000A Programmable Logic Device Data Sheet
TM
TM
serial download cable, as well as
v
v
serial/universal serial bus (USB)
-5
v
v
Speed Grade
-6
TM
parallel port download
v
v
v
v
v
v
v
-7
Table
-10
v
v
v
v
v
v
v
2.
-12
v
v
v
3