EPM7512BBC256-10 Altera, EPM7512BBC256-10 Datasheet - Page 12
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EPM7512BBC256-10
Manufacturer Part Number
EPM7512BBC256-10
Description
IC MAX 7000 CPLD 512 256-BGA
Manufacturer
Altera
Series
MAX® 7000Br
Datasheet
1.EPM7256BFC256-7.pdf
(66 pages)
Specifications of EPM7512BBC256-10
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
2.375 V ~ 2.625 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
212
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Voltage
2.5V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7512BBC256-10
Manufacturer:
CY
Quantity:
143
MAX 7000B Programmable Logic Device Data Sheet
12
Figure 5. MAX 7000B PIA Routing
While the routing delays of channel-based routing schemes in masked or
field-programmable gate arrays (FPGAs) are cumulative, variable, and
path-dependent, the MAX 7000B PIA has a predictable delay. The PIA
makes a design’s timing performance easy to predict.
I/O Control Blocks
The I/O control block allows each I/O pin to be individually configured
for input, output, or bidirectional operation. All I/O pins have a tri-state
buffer that is individually controlled by one of the global output enable
signals or directly connected to ground or V
control block for MAX 7000B devices. The I/O control block has
six or ten global output enable signals that are driven by the true or
complement of two output enable signals, a subset of the I/O pins, or a
subset of the I/O macrocells.
PIA Signals
CC
.
Figure 6
Altera Corporation
shows the I/O
To LAB