XC9572-15TQG100I Xilinx Inc, XC9572-15TQG100I Datasheet - Page 10

• Manufacturer Part Number: XC9572-15TQG100I
• Description: IC CPLD 72MCELL 15NS 100-TQFP
• Manufacturer: Xilinx Inc
• Series: XC9500r

Specifications of XC9572-15TQG100I

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 15.0ns
• Voltage Supply - Internal: 4.5 V ~ 5.5 V
• Number Of Logic Elements/blocks: 4
• Number Of Macrocells: 72
• Number Of Gates: 1600
• Number Of I /o: 72
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Features: JTAG
• Voltage: 3.0 V ~ 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Type: -
• Number Of Logic Elements/cells: -

XC9500 In-System Programmable CPLD Family
Fast CONNECT Switch Matrix
The Fast CONNECT switch matrix connects signals to the
FB inputs, as shown in
sponding to user pin inputs) and all FB outputs drive the
Fast CONNECT matrix. Any of these (up to a FB fan-in limit
of 36) may be selected, through user programming, to drive
each FB with a uniform delay.
10
Wired-AND
Capability
Figure
Fast CONNECT
Switch Matrix
9. All IOB outputs (corre-
(36)
(36)
Figure 9: Fast CONNECT Switch Matrix
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Function Block
Function Block
The Fast CONNECT switch matrix is capable of combining
multiple internal connections into a single wired-AND output
before driving the destination FB. This provides additional
logic capability and increases the effective logic fan-in of the
destination FB without any additional timing delay. This
capability is available for internal connections originating
from FB outputs only. It is automatically invoked by the
development software where applicable.
D/T Q
D/T Q
18
18
DS063 (v5.5) June 25, 2007
I/O Block
I/O Block
Product Specification
DS063_09_110501
I/O
I/O
R