XCR3128XL-7TQ144C Xilinx Inc, XCR3128XL-7TQ144C Datasheet

IC CPLD 128MCELL 3.3V HP 144TQFP

XCR3128XL-7TQ144C

Manufacturer Part Number
XCR3128XL-7TQ144C
Description
IC CPLD 128MCELL 3.3V HP 144TQFP
Manufacturer
Xilinx Inc
Series
CoolRunner XPLA3r
Datasheet

Specifications of XCR3128XL-7TQ144C

Programmable Type
In System Programmable (min 1K program/erase cycles)
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
128
Number Of Gates
3000
Number Of I /o
108
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Features
Low Power
Voltage
3.3V
Memory Type
EEPROM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XCR3128XL-7TQ144C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XCR3128XL-7TQ144C
Manufacturer:
XILINX
0
Part Number:
XCR3128XL-7TQ144C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Part Number:
XCR3128XL-7TQ144CR02
Manufacturer:
XILINX
0
DS016 (v2.6) March 31, 2006
Features
Table 1: Typical I
DS016 (v2.6) March 31, 2006
Product Specification
Frequency (MHz)
Typical I
Low power 3.3V 128 macrocell CPLD
5.5 ns pin-to-pin logic delays
System frequencies up to 175 MHz
128 macrocells with 3,000 usable gates
Available in small footprint packages
-
-
-
Optimized for 3.3V systems
-
-
-
-
-
-
Advanced system features
-
-
-
-
-
-
-
-
Fast ISP programming times
Port Enable pin for additional I/O
2.7V to 3.6V supply voltage at industrial temperature
range
Programmable slew rate control per output
Security bit prevents unauthorized access
Refer to XPLA3 family data sheet (DS012) for
architecture description
© 2006 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
144-pin TQFP (108 user I/O pins)
144-ball CS BGA (108 user I/O)
100-pin VQFP (84 user I/O)
Ultra low power operation
Typical Standby Current of 17 μA at 25° C
5V tolerant I/O pins with 3.3V core supply
Advanced 0.35 micron five layer metal EEPROM
process
Fast Zero Power™ (FZP) CMOS design
technology
3.3V PCI electrical specification compatible outputs
(no internal clamp diode on any input or I/O)
In-system programming
Input registers
Predictable timing model
Up to 23 available clocks per function block
Excellent pin retention during design changes
Full IEEE Standard 1149.1 boundary-scan (JTAG)
Four global clocks
Eight product term control terms per function block
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
CC
(mA)
CC
0.017
vs. Frequency at V
0
R
0.5
1
2.48
5
CC
= 3.3V, 25°C
4.97
10
0
0
www.xilinx.com
9.89
20
14
XCR3128XL 128 Macrocell CPLD
Product Specification
Description
The CoolRunner™ XPLA3 XCR3128XL device is a 3.3V
128 macrocell CPLD targeted at power sensitive designs
that require leading edge programmable logic solutions. A
total of eight function blocks provide 3,000 usable gates.
Pin-to-pin propagation delays are as fast as 5.5 ns with a
maximum system frequency of 175 MHz.
TotalCMOS Design Technique for Fast
Zero Power
CoolRunner XPLA3 CPLDs offer a TotalCMOS™ solution,
both in process technology and design technique. Xilinx
employs a cascade of CMOS gates to implement its sum of
products instead of the traditional sense amp approach.
This CMOS gate implementation allows Xilinx CPLDs to
offer devices that are both high performance and low power,
breaking the paradigm that to have low power, you must
have low performance. Refer to
Table
XCR3128XL TotalCMOS CPLD (data taken with eight
resetable up/down, 16-bit counters at 3.3V, 25°C).
Figure 1: Typical I
19.7
40
80
70
60
50
40
30
20
10
1or
0
0
Table 2
29.5
60
20
showing the I
39.1
CC
80
40
vs. Frequency at V
Frequency (MHz)
60
48.7
100
80
CC
Figure 1
58.0
120
vs. Frequency of the
100
CC
or
120
67.3
140
Figure 2
= 3.3V, 25°C
DS016_01_120902
140 160
76.8
160
and
1

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XCR3128XL-7TQ144C Summary of contents

Page 1

... Product Specification 0 14 Description The CoolRunner™ XPLA3 XCR3128XL device is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of eight function blocks provide 3,000 usable gates. Pin-to-pin propagation delays are as fast as 5.5 ns with a maximum system frequency of 175 MHz ...

Page 2

... XCR3128XL 128 Macrocell CPLD DC Electrical Characteristics Over Recommended Operating Conditions Symbol Parameter (2) V Output High voltage OH V Output Low voltage for 3.3V outputs Input leakage current IL I I/O High-Z leakage current IH (7) I Standby current CCSB (4,5) I Dynamic current CC (6) C Input pin capacitance ...

Page 3

... DS012 ) for recommended operating conditions. (1,2) -6 Min. Max. - 1.3 - 2.3 - 0.8 - 2.2 - 4.2 - 1.3 1.0 - 0.3 - www.xilinx.com XCR3128XL 128 Macrocell CPLD (1,2) -7 -10 Max. Min. Max. Min. Max. 5.5 - 7.0 - 9.1 6.0 - 7.5 - 10.0 4.0 5.0 - 6.5 - 3 ...

Page 4

... XCR3128XL 128 Macrocell CPLD Symbol Parameter T Register clock enable setup time ECSU T Register clock enable hold time ECHO T Register clock to output delay COI T Register async. S/R to output delay AOI T Register async. recovery RAI T Product term clock delay PTCK T Internal logic delay (single p-term) ...

Page 5

... OUT Measurement T POE (High POE (Low Note: For T output level of V Figure 3: AC Load Circuit +3. DS016_04a_120902 PD2 www.xilinx.com XCR3128XL 128 Macrocell CPLD Values 390Ω 390Ω Open Closed Closed Open Closed Closed , pF. Delay measured at POD + 300 mV, V – 300 mV. OL ...

Page 6

... Table 3: XCR3128XL I/O Pins (Continued) Function Block CS144 TQ144 3 108 108 CS144 TQ144 3 B12 106 3 (1) (1) D11 104 3 D12 102 3 D13 101 3 E10 100 3 E11 99 3 E12 E13 97 4 F10 96 4 F12 94 4 F13 93 4 G10 92 4 G11 91 4 A13 107 ...

Page 7

... R Table 3: XCR3128XL I/O Pins (Continued) Function Block Macrocell VQ100 ( DS016 (v2.6) March 31, 2006 Product Specification Table 3: XCR3128XL I/O Pins (Continued) Function CS144 TQ144 Block C4 139 7 B4 138 137 7 D5 136 8 B5 134 8 A5 133 8 D6 132 8 C6 131 (1) ( Notes: 1. JTAG pins ...

Page 8

... IN3 / CLK3 87 TCK 62 TDI 4 TDO 73 TMS 15 (1) PORT_EN 11 Vcc 3, 18, 34, A10, B2, B6, 39, 51, 66, B8, D4, F11, 82, 91 J2, K6, K7, L13, N5, 8 Table 4: XCR3128XL Global, JTAG, Port Enable, Power, and No Connect Pins Pin Type CS144 TQ144 GND D7 128 C7 127 A7 126 B7 125 No Connects G12 D11 104 H2 ...

Page 9

... XCR3128XL-6VQ100C 6 ns XCR3128XL-6VQG100C 6 ns XCR3128XL-6CS144C 6 ns XCR3128XL-6CSG144C 6 ns XCR3128XL-6TQ144C 6 ns XCR3128XL-6TQG144C 6 ns XCR3128XL-7VQ100C 7.5 ns XCR3128XL-7VQG100C 7.5 ns XCR3128XL-7CS144C 7.5 ns XCR3128XL-7CSG144C 7.5 ns XCR3128XL-7TQ144C 7.5 ns XCR3128XL-7TQG144C 7.5 ns XCR3128XL-7VQ100I 7.5 ns XCR3128XL-7VQG100I 7.5 ns XCR3128XL-7CS144I 7.5 ns XCR3128XL-7CSG144I 7.5 ns XCR3128XL-7TQ144I 7.5 ns XCR3128XL-7TQG144I 7.5 ns XCR3128XL-10VQ100C 10 ns XCR3128XL-10VQG100C 10 ns XCR3128XL-10CS144C ...

Page 10

... XCR3128XL 128 Macrocell CPLD Speed Device Ordering and (pin-to-pin Part Marking Number delay) XCR3128XL-10VQ100I 10 ns XCR3128XL-10VQG100I 10 ns XCR3128XL-10CS144I 10 ns XCR3128XL-10CSG144I 10 ns XCR3128XL-10TQ144I 10 ns XCR3128XL-10TQG144I 10 ns Notes Commercial 0° to +70° Industrial Warranty Disclaimer THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www ...

Page 11

... Added I CCSB 03/31/06 2.6 Added Warranty Disclaimer. Added Pb-Free information to ordering table. DS016 (v2.6) March 31, 2006 Product Specification Revision and Deleted derating curve for T OH LOGI3 Typical and T specifications. Removed T APRPW www.xilinx.com XCR3128XL 128 Macrocell CPLD for MOSIV PD2 specification. SOL 11 ...

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