XC95144-10PQG100C Xilinx Inc, XC95144-10PQG100C Datasheet
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XC95144-10PQG100C
Specifications of XC95144-10PQG100C
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XC95144-10PQG100C Summary of contents
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... Function Blocks, providing 3,200 usable gates with propagation delays of 7.5 ns. See ture overview. Power Management Power dissipation can be reduced in the XC95144 by con- figuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation. Operating current for each design can be approximated for ...
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... I/O/GSR 2 I/O/GTS Function block outputs (indicated by the bold line) drive the I/O blocks directly. DS067 (v5.7) May 28, 2009 Product Specification JTAG In-System Programming Controller Controller I/O Blocks Figure 2: XC95144 Architecture www.xilinx.com XC95144 In-System Programmable CPLD 36 Function 18 Block 1 Macrocells Function 18 Block 2 Macrocells ...
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... –3 Max GND Max GND GND 1.0 MHz V = GND, No load 1.0 MHz www.xilinx.com XC95144 In-System Programmable CPLD Value –0.5 to 7.0 –0 0.5 CC –0 0.5 CC –65 to +150 +150 Min Max o C 4.75 5. 4.5 5 4.75 5. 4.5 5.5 3.0 3.6 0 0.80 2 0.5 CCINT ...
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... Export Control Maximum flip-flop toggle rate, f CNT the internal operating frequency for general purpose system designs spanning multiple FBs. SYSTEM V TEST R 1 Device Output R 2 DS067 (v5.7) May 28, 2009 Product Specification XC95144 In-System Programmable CPLD XC95144-7 Min Max - 7.5 4 4.5 125 ...
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... Incremental product term allocator delay PTA T Slew-rate limited delay SLEW Notes multiplied by the span of the function as defined in the XC9500 family data sheet. PTA DS067 (v5.7) May 28, 2009 Product Specification XC95144 In-System Programmable CPLD XC95144-7 XC95144-10 Min Max Min Max - 2 ...
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... XC95144 In-System Programmable CPLD Macro- cell TQ100 PQ100 PQ160 1 – – 43 [1] [1] [ – – – – – – 50 [1] [1] [ ...
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... XC95144 In-System Programmable CPLD Macro- cell TQ100 PQ100 PQ160 1 – – – – – – – – – 87 ...
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... R XC95144 Global, JTAG, and Power Pins Pin Type I/O/GCK1 I/O/GCK2 I/O/GCK3 I/O/GTS1 I/O/GTS2 I/O/GTS3 I/O/GTS4 I/O/GSR TCK TDI TDO TMS V 5V CCINT V 3.3V/5V CCIO GND 100, 21, 31, 44, 62, 69, 75, No Connects DS067 (v5.7) May 28, 2009 Product Specification TQ100 PQ100 57 59, 100 26, 38, 51, 88 ...
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... Device Ordering and (pin-to-pin Part Marking Number delay) XC95144-7PQ100C 7.5 ns XC95144-7PQG100C 7.5 ns XC95144-7TQ100C 7.5 ns XC95144-7TQG100C 7.5 ns XC95144-7PQ160C 7.5 ns XC95144-7PQG160C 7.5 ns XC95144-10PQ100C 10 ns XC95144-10PQG100C 10 ns XC95144-10TQ100C 10 ns XC95144-10TQG100C 10 ns XC95144-10PQ160C 10 ns XC95144-10PQG160C 10 ns XC95144-10PQ100I 10 ns XC95144-10PQG100I 10 ns XC95144-10TQ100I 10 ns XC95144-10TQG100I 10 ns XC95144-10PQ160I ...
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... PQ160 160-pin Plastic Quad Flat Pack (PQFP) PQG160 160-pin Plastic Quad Flat Pack (PQFP); Pb-Free = –40° to +85°C A Packages Revision THE XILINX LIMITED WARRANTY www.xilinx.com XC95144 In-System Programmable CPLD Operating Package Type Range ). APRPW XC95144 I/O WHICH CAN BE VIEWED ( Pins. ...