XC95288XV-7FG256C Xilinx Inc, XC95288XV-7FG256C Datasheet
XC95288XV-7FG256C
Specifications of XC95288XV-7FG256C
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XC95288XV-7FG256C Summary of contents
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... ESD protection exceeding 2,000V Description The XC95288XV is a 2.5V CPLD targeted for high-perfor- mance, low-voltage applications in leading-edge communi- cations and computing systems comprised of 16 54V18 Function Blocks, providing 6,400 usable gates with propagation delays of 6 ns. © 2005, 2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. ...
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... XC95288XV High-Performance CPLD application note XAPP361, “Planning for High Speed XC9500XV Designs.” 450 400 350 300 250 200 150 100 100 C lock F requency ( Figure 1: Typical I vs. Frequency for XC95288XV CC 2 150 200 250 DS050_01_041405 www.xilinx.com R DS050 (v3.0) June 25, 2007 Product Specification ...
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... I/O/GCK 1 I/O/GSR 4 I/O/GTS (Function Block outputs (indicated by the bold line) drive the I/O Blocks directly.) DS050 (v3.0) June 25, 2007 Product Specification JTAG In-System Programming Controller Controller I/O Blocks Figure 2: XC95288XV Architecture www.xilinx.com XC95288XV High-Performance CPLD 54 Function 18 Block 1 Macrocells Function 18 Block 2 Macrocells ...
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... Table 1: IOSTANDARD Options IOSTANDARD V CCIO LVTTL 3.3V LVCMOS2 2.5V X25TO18 1.8V The XC95288XV CPLD features both LVCMOS and LVTTL I/O implementations. See Table 1 for I/O standard voltages. Absolute Maximum Ratings Symbol V Supply voltage relative to GND CC V Supply voltage for output drivers ...
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... MHz V = GND, No load 1.0 MHz XC95288XV-6 Min Max - 6.0 4 3.8 - 208 1 6.8 - 4.5 - 4.5 - 8.4 - 8.4 www.xilinx.com XC95288XV High-Performance CPLD Min Max Units 20 - Years 1,000 - Cycles 2,000 - Volts Min Max 2.4 - 2 CCIO - 0.4 - 0.4 - 0.4 - ±10 - ±10 - ±150 ...
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... XC95288XV High-Performance CPLD Symbol Parameter T GSR to output valid AO T P-term S/R to output valid PAO T GCK pulse width (High or Low) WLH T P-term clock pulse width (High or Low) PLH T Asynchronous preset/reset pulse width APRPW (High or Low) 6 XC95288XV-6 XC95288XV-7 Min Max Min Max - 10 ...
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... XC95288XV High-Performance CPLD 320Ω 360Ω 250Ω 660Ω 10KΩ 14KΩ DS050_03_110101 XC95288XV-7 XC95288XV-10 Min Max Min Max Units - 2.3 - 3.5 - 1 ...
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... XC95288XV High-Performance CPLD XC95288XV I/O Pins Function Macro- Block cell TQ144 PQ208 FG256 CS280 Notes: 1. Global control pin 8 BScan Function Order Bank Block - - 861 - 3 K2 858 855 852 - 3 K4 849 846 843 - 3 L2 840 837 834 831 828 825 - 3 M3 822 ...
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... R XC95288XV I/O Pins (continued) Function Macro- Block cell TQ144 PQ208 FG256 CS280 (1) ( 135 197 136 198 137 199 138 200 139 201 140 202 203 142 205 B4 (1) ( 143 206 208 Notes: 1. Global control pin DS050 (v3.0) June 25, 2007 Product Specification ...
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... XC95288XV High-Performance CPLD XC95288XV I/O Pins (continued) Function Macro- Block cell TQ144 PQ208 FG256 CS280 T10 M10 R10 T11 117 170 B11 10 3 118 171 D11 119 173 A11 10 6 120 174 D10 121 175 B10 E12 10 10 124 178 F12 ...
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... R XC95288XV I/O Pins (continued) Function Macro- Block cell TQ144 PQ208 FG256 CS280 103 P13 106 P15 107 N14 109 R16 110 N15 M15 111 M13 112 P16 113 N16 114 M14 115 L15 116 L13 144 F15 14 3 100 145 E15 ...
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... XC95288XV High-Performance CPLD XC95288XV Global, JTAG and Power Pins Pin Type TQ144 I/O/GCK1 30 I/O/GCK2 32 I/O/GCK3 38 I/O/GTS1 5 I/O/GTS2 6 I/O/GTS3 2 I/O/GTS4 3 I/O/GSR 143 TCK 67 TDI 63 (1) TDO 122 TMS 65 V 2.5V 8, 42, 84, 141 CCINT V 37 CCIO1 V 1 CCIO2 V 55, 73 CCIO3 V 109, 127 CCIO4 ...
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... Operating Range Speed Device Ordering and (pin-to-pin Part Marking Number delay) XC95288XV-6TQ144C 6 ns XC95288XV-6PQ208C 6 ns XC95288XV-6FG256C 6 ns XC95288XV-6CS280C 6 ns XC95288XV-7TQ144C 7.5 ns XC95288XV-7PQ208C 7.5 ns XC95288XV-7FG256C 7.5 ns XC95288XV-7CS280C 7.5 ns XC95288XV-7TQ144I 7.5 ns XC95288XV-7PQ208I 7.5 ns XC95288XV-7FG256I 7.5 ns XC95288XV-7CS280I 7.5 ns XC95288XV-10TQ144C 10 ns XC95288XV-10PQ208C 10 ns XC95288XV-10FG256C 10 ns ...
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... XC95288XV High-Performance CPLD Revision History Date Version 09/28/98 1.0 Original creation of data sheet. 12/10/98 1.1 Revision of tables. 2/5/99 1.2 Updated pinouts to reflect BG256 (replaces BG352). 6/7/99 1.3 Add -7 speed and CS280 package. 4/11/00 1.4 Updated AC specifications, added bank information to pinout tables. ...