MSC8126TVT6400 Freescale Semiconductor, MSC8126TVT6400 Datasheet - Page 32

• Manufacturer Part Number: MSC8126TVT6400
• Description: IC DSP QUAD 16B 400MHZ 431FCPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC81xx StarCorer
• Type: SC140 Corer

Specifications of MSC8126TVT6400

• Interface: DSI, Ethernet, RS-232
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 1.436MB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 431-FCPBGA
• Device Core Size: 16b
• Clock Freq (max): 400MHz
• Mips: 400
• Device Input Clock Speed: 400MHz
• Operating Supply Voltage (typ): 1.1/1.1/1.2/1.2/3.3V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 431
• Package Type: FCBGA
• For Use With: MSC8126ADSE - KIT ADVANCED DEV SYSTEM 8126
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
2.5.7
32
Notes:
No.
300
301
302
303
304
305
306
307
308
309
310
TDMxRCLK/TDMxTCLK
TDMxRCLK/TDMxTCLK high pulse width
TDMxRCLK/TDMxTCLK low pulse width
TDM receive all input set-up time
TDM receive all input hold time
TDMxTCLK high to TDMxTDAT/TDMxRCLK output active
TDMxTCLK high to TDMxTDAT/TDMxRCLK output valid
All output hold time
TDMxTCLK high to TDmXTDAT/TDMxRCLK output high impedance
TDMxTCLK high to TDMXTSYN output valid
TDMxTSYN output hold time
1.
2.
3.
4.
5.
TDM Timing
Values are based on a a maximum frequency of 62.5 MHz. The TDM interface supports any frequency below 62.5 MHz.
Values are based on 20 pF capacitive load.
When configured as an output, TDMxRCLK acts as a second data link. See the MSC8126 Reference Manual for details.
CLKOUT synchronization is not supported for cores operating at above 400 MHz.
Values are based on 10 pF capacitive load.
TDMxRDAT
TDMxRCLK
TDMxRSYN
TDMxTSYN
TDMxRCLK
TDMxTCLK
TDMxTDAT
5
MSC8126 Quad Digital Signal Processor Data Sheet, Rev. 15
5
303
303
Characteristic
Figure 19. TDM Output Signals
Figure 18. TDM Inputs Signals
2
Table 21. TDM Timing
305
306
301
304
301
304
2,3
2,3
300
309
300
2,3
302
302
(0.5 ± 0.1) × TC
(0.5 ± 0.1) × TC
Expression
TC
1
307
308
Freescale Semiconductor
Ref = CLKIN
Min
1.3
1.0
2.8
2.5
2.5
16
—
—
—
7
7
310
Max
10.5
8.8
8.5
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns