Z8927320VSG Zilog, Z8927320VSG Datasheet - Page 30

DSP 20MHZ 16-BIT W/ A/D 44-PLCC

Z8927320VSG

Manufacturer Part Number
Z8927320VSG
Description
DSP 20MHZ 16-BIT W/ A/D 44-PLCC
Manufacturer
Zilog
Series
Z892x3r
Type
Fixed Pointr
Datasheet

Specifications of Z8927320VSG

Interface
SPI, 3-Wire Serial
Clock Rate
20MHz
Non-volatile Memory
OTP (16 kB)
On-chip Ram
1kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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BANK/EXT REGISTER ASSIGNMENTS (Continued)
Z89223/273/323/373
16-Bit Digital Signal Processors with A/D Converter
Interrupt Status/Bank Select RegisterÑEXT7
Following is a description of EXT7. It contains both a Bank
Select Field and Interrupt Status Bits.
Bank Select Field.
bank is selected as the current working bank.
Interrupt Status Bits.
which interrupts are pending. A “1” denotes interrupt pend-
ing, and a “0” denotes no interrupt. This ability to identify in-
terrupts is particularly useful in polled interrupt operation or
when servicing ISR2, which may come from several sources.
30
Ext 7 Reg
D15 D14 D13 D12 D11 D10 D9
The four LSBs of EXT7 denote which
These bits can be read to identify
D8
D7 D6
Figure 20. EXT7 Register
D5
D4
Note: Write “1” to a particular status bit to clear that bit. Before
D3 D2
exiting an interrupt service routine, the relevant interrupt
bit(s) should be cleared. To clear a bit efficiently:
• Load the value of EXT7 into a register or memory
• Then load that value back into EXT7
Performing these steps clear all of the interrupts that
were pending, but leave the Register Bank Select
unchanged.
location
D1 D0
Bank Select
Interrupt Status Bits
Reserved
0000 : Bank0
0001 : Bank1
1111 : Bank15
Bit 4 = A/D Finish Interrupt
Bit 5 = SPI Interrupt
Bit 6 = Timer0 Interrupt
Bit 7 = Timer1 Interrupt
Bit 8 = Timer2 Interrupt
Bit 9 = INT0 (H/W) Interrupt
Bit 10 = INT1 (H/W) Interrupt
Bit 11 = INT2 (H/W) Interrupt
:
:
DS000202-DSP0599
ZiLOG

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