ADSP-21061LAS-176 Analog Devices Inc, ADSP-21061LAS-176 Datasheet - Page 15

• Manufacturer Part Number: ADSP-21061LAS-176
• Description: IC DSP CONTROLLER 32BIT 240MQFP
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21061LAS-176

• Rohs Status: RoHS non-compliant
• Interface: Synchronous Serial Port (SSP)
• Clock Rate: 44MHz
• Non-volatile Memory: External
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 240-MQFP, 240-PQFP
• Device Core Size: 32b
• Architecture: Super Harvard
• Format: Floating Point
• Clock Freq (max): 44MHz
• Mips: 44
• Device Input Clock Speed: 44MHz
• Ram Size: 128KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: MQFP
• Lead Free Status / Rohs Status: Not Compliant

ADSP-21061 SPECIFICATIONS
OPERATING CONDITIONS (5 V)
1
2
ELECTRICAL CHARACTERISTICS (5 V)
1
2
3
4
5
6
7
8
9
10
11
Applies to input and bidirectional pins: DATA
Applies to input pins: CLKIN, RESET, TRST.
Applies to output and bidirectional pins: DATA
See “Output Drive Currents” for typical drive current capabilities.
Applies to input pins: ACK, SBTS, IRQ
Applies to input pins with internal pull-ups:DR0, DR1, TRST, TMS, TDI, EMU.
Applies to three-statable pins: DATA
Applies to three-statable pins with internal pull-ups: DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1.
Applies to CPA pin.
Applies to ACK pin when pulled up. (Note that ACK is pulled up internally with 2 kΩ during reset in a multiprocessor system, when ID
Applies to ACK pin when keeper latch enabled.
Applies to all signal pins.
Guaranteed but not tested.
Parameter
V
T
V
V
V
TFS1, RFS0, RFS1, EBOOT, BMS, TMS, TDI, TCK, HBR, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1.
Parameter
V
V
I
I
I
I
I
I
I
I
I
I
C
BR
TDO, EMU. (Note that ACK is pulled up internally with 2 kΩ during reset in a multiprocessor system, when ID
mastership.)
is not requesting bus mastership).
IH
IL
ILP
OZH
OZL
OZHP
OZLC
OZLA
OZLAR
OZLS
CASE
DD
IH
IH
IL
OH
OL
3
IN
3, 4
4
1
2
10, 11
6–1
1, 2
1, 2
5
1, 2
5, 6, 7, 8
6
1
2
7
9
8
, CPA, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, BMS, TDO, EMU, ICSA.
Description
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
Low Level Input Current
Low Level Input Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Input Capacitance
Description
Supply Voltage
Case Operating Temperature
High Level Input Voltage @ V
High Level Input Voltage @ V
Low Level Input Voltage @ V
47–0
2–0
, ADDR
, HBR, CS, DMAR1, DMAR2, ID
47–0
47-0
31–0
, ADDR
, ADDR
, MS
3–0
31–0
31-0
, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG
, RD, WR, SW , ACK, SBTS, IRQ2–0, FLAG3–0, HGB, CS, DMAR1, DMAR2, BR
DD
, 3-0, MS
DD
DD
Rev. C | Page 15 of 56 | July 2007
= Min
= Max
= Max
3–0
, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3-0, TIMEXP, HBG, REDY, DMAG1, DMAG2,
2–0
, RPBA, EBOOT, LBOOT, CLKIN, RESET, TCK.
Test Conditions
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
f
IN
= 1 MHz, T
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= Min, I
= Min, I
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
CASE
OH
OL
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
= 4.0 mA
= –2.0 mA
= V
= 0 V
= 0 V
= V
= 0 V
= V
= 0 V
= 1.5 V
= 0 V
= 0 V
= 25°C, V
DD
DD
DD
3–0
Max
Max
Max
, HBG, REDY, DMAG1, DMAG2, BMS, BR
Min
4.75
0
2.0
2.2
–0.5
IN
2–0
= 2.5 V
= 001 and another ADSP-21061 is not requesting bus
ADSP-21061/ADSP-21061L
K Grade
2–0
Max
5.25
85
V
V
+0.8
DD
DD
Min
4.1
= 001 and another ADSP-21061L
+ 0.5
+ 0.5
6–1
, ID
2–0
Max
0.4
10
10
150
10
10
350
1.5
350
4.2
150
4.7
, RPBA, CPA, TFS0,
6–1
, TFSx, RFSx,
Unit
V
V
μA
μA
μA
μA
μA
μA
mA
μA
mA
μA
pF
Unit
V
°C
V
V
V