EP1C3T100I7N Altera, EP1C3T100I7N Datasheet - Page 21

• Manufacturer Part Number: EP1C3T100I7N
• Description: IC CYCLONE FPGA 2910 LE 100-TQFP
• Manufacturer: Altera
• Series: Cyclone®r

Specifications of EP1C3T100I7N

• Number Of Logic Elements/cells: 2910
• Number Of Labs/clbs: 291
• Total Ram Bits: 59904
• Number Of I /o: 65
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 100-TQFP, 100-VQFP
• Family Name: Cyclone®
• Number Of Logic Blocks/elements: 2910
• # I/os (max): 65
• Frequency (max): 320.1MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 2910
• Ram Bits: 59904
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1663

Altera Corporation
May 2008
Figure 2–10. LUT Chain and Register Chain Interconnects
The C4 interconnects span four LABs or M4K blocks up or down from a
source LAB. Every LAB has its own set of C4 interconnects to drive either
up or down.
LAB in a column. The C4 interconnects can drive and be driven by all
types of architecture blocks, including PLLs, M4K memory blocks, and
column and row IOEs. For LAB interconnection, a primary LAB or its
LAB neighbor can drive a given C4 interconnect. C4 interconnects can
drive each other to extend their range as well as drive row interconnects
for column-to-column connections.
Interconnect
Figure 2–11
Adjacent LE
Routing to
LUT Chain
Local
shows the C4 interconnect connections from a
Local Interconnect
Routing Among LEs
in the LAB
LE 10
LE 1
LE 2
LE 3
LE 4
LE 5
LE 6
LE 7
LE 8
LE 9
Register Chain
Routing to Adjacent
LE's Register Input
MultiTrack Interconnect
Preliminary
2–15