EP2C8F256I8 Altera, EP2C8F256I8 Datasheet - Page 50

IC CYCLONE II FPGA 8K 256-FBGA

EP2C8F256I8

Manufacturer Part Number
EP2C8F256I8
Description
IC CYCLONE II FPGA 8K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C8F256I8

Number Of Logic Elements/cells
8256
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
8256
# I/os (max)
182
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
8256
Ram Bits
165888
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2150

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0
I/O Structure & Features
2–38
Cyclone II Device Handbook, Volume 1
Figure 2–20. Cyclone II IOE Structure
Note to
(1)
The IOEs are located in I/O blocks around the periphery of the Cyclone II
device. There are up to five IOEs per row I/O block and up to four IOEs
per column I/O block (column I/O blocks span two columns). The row
I/O blocks drive row, column (only C4 interconnects), or direct link
interconnects. The column I/O blocks drive column interconnects.
Figure 2–21
Figure 2–22
There are two paths available for combinational or registered inputs to the logic
array. Each path contains a unique programmable delay chain.
Figure
Logic Array
shows how a row I/O block connects to the logic array.
shows how a column I/O block connects to the logic array.
2–20:
Input (1)
Output
OE
Output Register
Input Register
OE Register
Altera Corporation
February 2007

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