EP1K100QC208-2N Altera, EP1K100QC208-2N Datasheet - Page 11

• Manufacturer Part Number: EP1K100QC208-2N
• Description: IC ACEX 1K FPGA 100K 208-PQFP
• Manufacturer: Altera
• Series: ACEX-1K®r

Specifications of EP1K100QC208-2N

• Number Of Logic Elements/cells: 4992
• Number Of Labs/clbs: 624
• Total Ram Bits: 49152
• Number Of I /o: 147
• Number Of Gates: 257000
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Family Name: ACEX™ 1K
• Number Of Usable Gates: 100000
• Number Of Logic Blocks/elements: 4992
• # I/os (max): 147
• Frequency (max): 250MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 2.5V
• Logic Cells: 4992
• Ram Bits: 49152
• Device System Gates: 257000
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1824; EP1K100QC208-2N

Altera Corporation
Figure 3. ACEX 1K EAB in Dual-Port RAM Mode
Figure 4. ACEX 1K Device in Single-Port RAM Mode
Note:
(1)
EAB Local
Interconnect (1)
EP1K10, EP1K30, and EP1K50 devices have 88 EAB local interconnect channels; EP1K100 devices have 104 EAB
local interconnect channels.
Dedicated
Clocks
2
Clock A
Dedicated Inputs
& Global Signals
4
8, 9, 10, 11
8, 4, 2, 1
Chip-Wide
Reset
address_a[]
data_a[]
we_a
clkena_a
Port A
ACEX 1K Programmable Logic Device Family Data Sheet
D
D
D
Q
Q
Q
address_b[]
Row Interconnect
clkena_b
Port B
data_b[]
we_b
Data In
Address
Write Enable
RAM/ROM
1,024
2,048
Data Out
256
512
16
8
4
2
Clock B
D
Q
4, 8, 16, 32
Column Interconnect
4, 8, 16, 32
4, 8
11
13