EP1S20F780C7N Altera, EP1S20F780C7N Datasheet - Page 83

• Manufacturer Part Number: EP1S20F780C7N
• Description: IC STRATIX FPGA 20K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F780C7N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 586
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 18460
• # I/os (max): 586
• Frequency (max): 420.17MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 18460
• Ram Bits: 1669248
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1855; EP1S20F780C7N

Figure 2–39. Four-Multipliers Adder Mode
Notes to
(1)
(2)
Altera Corporation
July 2005
These signals are not registered or registered once to match the data path pipeline.
These signals are not registered, registered once, or registered twice for latency to match the data path pipeline.
Data B
Data B
Data B
Data B
Data A
Data A
Data A
Data A
Figure
shiftout B
2–39:
shiftin B
shiftout A
ENA
ENA
ENA
ENA
ENA
ENA
ENA
ENA
D
D
D
D
D
D
D
D
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
shiftin A
Q
Q
Q
Q
Q
Q
Q
Q
signa (1)
signb (1)
clock
aclr
ena
ENA
ENA
ENA
ENA
D
D
D
D
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
addnsub1 (2)
addnsub3 (2)
signa (2)
signb (2)
Adder/Subtractor
Adder/Subtractor
Stratix Device Handbook, Volume 1
Summation
D
ENA
CLRN
Stratix Architecture
Q
Data Out
2–69