EP1C20F400C8 Altera, EP1C20F400C8 Datasheet - Page 55
EP1C20F400C8
Manufacturer Part Number
EP1C20F400C8
Description
IC CYCLONE FPGA 20K LE 400-FBGA
Manufacturer
Altera
Series
Cyclone®r
Datasheet
1.EP1C3T144C8.pdf
(106 pages)
Specifications of EP1C20F400C8
Number Of Logic Elements/cells
20060
Number Of Labs/clbs
2006
Total Ram Bits
294912
Number Of I /o
301
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
400-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1048
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1C20F400C8
Manufacturer:
Synaptics
Quantity:
38
Company:
Part Number:
EP1C20F400C8
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1C20F400C8
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP1C20F400C8ES
Manufacturer:
ALTERA
Quantity:
15
Company:
Part Number:
EP1C20F400C8N
Manufacturer:
ALTERA
Quantity:
748
Company:
Part Number:
EP1C20F400C8NAC
Manufacturer:
ALTERA
Quantity:
3 000
Figure 2–34. DDR SDRAM and FCRAM Interfacing
Altera Corporation
May 2008
PLL
OE
Phase Shifted -90˚
Register
OE LE
Register
OE LE
GND
V
CC
Output LE
Output LE
Register
Register
Programmable Drive Strength
The output buffer for each Cyclone device I/O pin has a programmable
drive strength control for certain I/O standards. The LVTTL and
LVCMOS standards have several levels of drive strength that the designer
can control. SSTL-3 class I and II, and SSTL-2 class I and II support a
minimum setting, the lowest drive strength that guarantees the I
Programmable
Delay Chain
clk
DQS
Δ t
OE
Register
OE LE
Global Clock
Register
OE LE
DataA
DataB
Output LE
Output LE
Registers
Registers
-90˚ clk
DQ
Adjacent LAB LEs
Register
Register
LE
LE
Registers
Registers
Input LE
Input LE
I/O Structure
Preliminary
Adjacent
LAB LEs
Resynchronizing
Global Clock
OH
/I
2–49
OL