EP2C50F672C8N Altera, EP2C50F672C8N Datasheet - Page 103

• Manufacturer Part Number: EP2C50F672C8N
• Description: IC CYCLONE II FPGA 50K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C50F672C8N

• Number Of Logic Elements/cells: 50528
• Number Of Labs/clbs: 3158
• Total Ram Bits: 594432
• Number Of I /o: 450
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• No. Of Logic Blocks: 3158
• Family Type: Cyclone II
• No. Of I/o's: 450
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 320MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1690

Power
Consumption
Altera Corporation
February 2008
Table 5–13
pin types.
You can calculate the power usage for your design using the PowerPlay
Early Power Estimator and the PowerPlay Power Analyzer feature in the
Quartus
The interactive PowerPlay Early Power Estimator is typically used
during the early stages of FPGA design, prior to finalizing the project, to
get a magnitude estimate of the device power. The Quartus II software
PowerPlay Power Analyzer feature is typically used during the later
stages of FPGA design. The PowerPlay Power Analyzer also allows you
to apply test vectors against your design for more accurate power
consumption modeling.
In both cases, only use these calculations as an estimation of power, not
as a specification. For more information on PowerPlay tools, refer to the
PowerPlay Early Power Estimator User Guide
Analysis
1
The power-up current required by Cyclone II devices does not exceed the
maximum static current. The rate at which the current increases is a
function of the system power supply. The exact amount of current
consumed varies according to the process, temperature, and power ramp
rate. The duration of the I
V
Note to
(1)
C
C
C
C
Table 5–13. Device Capacitance
CCINT
I O
L V D S
V R E F
C L K
Symbol
Capacitance is sample-tested only. Capacitance is measured using time-domain
reflectometry (TDR). Measurement accuracy is within ±0.5 pF.
voltage supply rise time.
Table
®
section in volume 3 of the Quartus II Handbook.
You can obtain the Excel-based PowerPlay Early Power
Estimator at www.altera.com. Refer to
typical I
II software.
shows the Cyclone II device pin capacitance for different I/O
5–13:
Input capacitance for user I/O pin.
Input capacitance for dual-purpose
LVDS/user I/O pin.
Input capacitance for dual-purpose
pin when used as
Input capacitance for clock pin.
CC
standby specifications.
CCINT
Parameter
DC Characteristics and Timing Specifications
VREF
power-up requirement depends on the
Note (1)
Cyclone II Device Handbook, Volume 1
or user I/O pin.
and the
VREF
Table 5–3 on page 5–3
Power Estimation and
Typical
21
6
6
5
Unit
pF
pF
pF
pF
5–13
for