EP2S60F484C5 Altera, EP2S60F484C5 Datasheet - Page 182

• Manufacturer Part Number: EP2S60F484C5
• Description: IC STRATIX II FPGA 60K 484-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S60F484C5

• Number Of Logic Elements/cells: 60440
• Number Of Labs/clbs: 3022
• Total Ram Bits: 2544192
• Number Of I /o: 334
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• For Use With: 544-1700 - DSP KIT W/STRATIX II EP2S60N544-1697 - NIOS II KIT W/STRATIX II EP2S60N
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Other names: 544-1134; EP2S60F484C5ES

Timing Model
5–46
Stratix II Device Handbook, Volume 1
t
t
t
t
t
t
t
t
t
t
t
t
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 5–56. EP2S90 Column Pins Regional Clock Timing Parameters
Table 5–57. EP2S90 Column Pins Global Clock Timing Parameters
Table 5–58. EP2S90 Row Pins Regional Clock Timing Parameters
Parameter
Parameter
Parameter
Industrial
Industrial
Industrial
-0.127
-0.284
-0.137
-0.294
-0.326
-0.321
1.768
1.611
1.783
1.626
1.566
1.571
Minimum Timing
Minimum Timing
Minimum Timing
EP2S90 Clock Timing Parameters
Tables 5–56
for EP2S90 devices.
Commercial
Commercial
Commercial
-0.117
-0.282
-0.127
-0.292
-0.326
-0.321
1.850
1.685
1.868
1.703
1.638
1.643
through
5–59
-3 Speed
-3 Speed
-3 Speed
Grade
-0.117
Grade
-0.127
Grade
-0.178
-0.182
show the maximum clock timing parameters
3.033
2.791
0.125
3.058
2.816
0.115
2.731
2.727
-4 Speed
-4 Speed
-4 Speed
Grade
-0.149
Grade
-0.159
Grade
-0.218
-0.222
3.473
3.195
0.129
3.502
3.224
0.119
3.124
3.120
-5 Speed
-5 Speed
-5 Speed
Altera Corporation
Grade
Grade
Grade
-0.264
-0.269
4.040
3.716
0.144
4.070
3.746
0.134
3.632
3.627
-0.18
-0.19
April 2011
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns