AT6002-2JC Atmel, AT6002-2JC Datasheet

IC FPGA 6K GATE 2NS 84PLCC

AT6002-2JC

Manufacturer Part Number
AT6002-2JC
Description
IC FPGA 6K GATE 2NS 84PLCC
Manufacturer
Atmel
Series
AT6000(LV)r
Datasheet

Specifications of AT6002-2JC

Number Of Logic Elements/cells
1024
Number Of I /o
64
Number Of Gates
6000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
Total Ram Bits
-
Other names
AT60022JC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT6002-2JC
Manufacturer:
Atmel
Quantity:
10 000
Features
Description
AT6000 Series SRAM-based Field Programmable Gate Arrays (FPGAs) are ideal for
use as reconfigurable coprocessors and implementing compute-intensive logic.
Supporting system speeds greater than 100 MHz and using a typical operating current
of 15 to 170 mA, AT6000 Series devices are ideal for high-speed, compute-intensive
designs. These FPGAs are designed to implement Cache Logic
user with the ability to implement adaptive hardware and perform hardware
acceleration.
The patented AT6000 Series architecture employs a symmetrical grid of small yet
powerful cells connected to a flexible busing network. Independently controlled clocks
and resets govern every column of cells. The array is surrounded by programmable
I/O.
AT6000 Series Field Programmable Gate Arrays
Device
Usable Gates
Cells
Registers (maximum)
I/O (maximum)
Typ. Operating Current (mA)
Cell Rows x Columns
High-performance
Up to 204 User I/Os
Thousands of Registers
Cache Logic
Low Voltage and Standard Voltage Operation
Automatic Component Generators
Very Low-power Consumption
Programmable Clock Options
Independently Configurable I/O (PCI Compatible)
Easy Migration to Atmel Gate Arrays for High Volume Production
– System Speeds > 100 MHz
– Flip-flop Toggle Rates > 250 MHz
– 1.2 ns/1.5 ns Input Delay
– 3.0 ns/6.0 ns Output Delay
– Complete/Partial In-System Reconfiguration
– No Loss of Data or Machine State
– Adaptive Hardware
– 5.0 (V
– 3.3 (V
– Reusable Custom Hard Macro Functions
– Standby Current of 500 µA/ 200 µA
– Typical Operating Current of 15 to 170 mA
– Independently Controlled Column Clocks
– Independently Controlled Column Resets
– Clock Skew Less Than 1 ns Across Chip
– TTL/CMOS Input Thresholds
– Open Collector/Tristate Outputs
– Programmable Slew-rate Control
– I/O Drive of 16 mA (combinable to 64 mA)
CC
CC
®
= 4.75V to 5.25V)
= 3.0V to 3.6V)
Design
AT6002
32 x 32
15 - 30
6,000
1,024
1,024
96
AT6003
40 x 40
25 - 45
1,600
9,000
1,600
120
AT6005
56 x 56
40 - 80
15,000
3,136
3,136
108
®
, which provides the
(continued)
85 - 170
AT6010
80 x 80
30,000
6,400
6,400
204
Coprocessor
Field
Programmable
Gate Arrays
AT6000(LV)
Series
Rev. 0264F–10/99
1

Related parts for AT6002-2JC

AT6002-2JC Summary of contents

Page 1

... The patented AT6000 Series architecture employs a symmetrical grid of small yet powerful cells connected to a flexible busing network. Independently controlled clocks and resets govern every column of cells. The array is surrounded by programmable I/O. AT6000 Series Field Programmable Gate Arrays Device AT6002 Usable Gates 6,000 Cells 1,024 Registers (maximum) ...

Page 2

... Figure 1. Symmetrical Array Surrounded by I/O AT6000(LV) Series 2 The Symmetrical Array At the heart of the Atmel architecture is a symmetrical array of identical cells (Figure 1). The array is continuous and completely uninterrupted from one edge to the other, except for bus repeaters spaced every eight cells (Figure 2). ...

Page 3

Figure 2. Busing Network (one sector) Figure 3. Cell-to-cell and Bus-to-bus Connections AT6000(LV) Series CELL REPEATER 3 ...

Page 4

... This option is primarily used to imple- ment long, tristate buses. The Cell Structure The Atmel cell (Figure 4) is simple and small and yet can be programmed to perform all the logic and wiring functions needed to implement any digital circuit. Its four sides are functionally identical, so each cell is completely symmetrical. Read/write access to the four local buses – ...

Page 5

... The AND of the outputs from the two upstream AND gates is provided to the cell's B output. Logic States The Atmel cell implements a rich and powerful set of logic functions, stemming from 44 logical cell states which per- mutate into 72 physical states. Some states use both A and B inputs. Other states are created by selecting the “ ...

Page 6

Figure 5. Combinatorial Physical States ...

Page 7

... GLOBAL CLOCK with registers requiring no reset. All registers are reset dur- ing power-up. Input/Output The Atmel architecture provides a flexible interface EXPRESS between the logic array, the configuration control logic and BUS the I/O pins. Two adjacent cells – an “exit” and an “entrance” cell – on ...

Page 8

Figure 11. A-type I/O Logic Figure 12. B-type I/O Logic TTL/CMOS Inputs A user-configurable bit determines the threshold level – TTL or CMOS – of the input buffer. Open Collector/Tristate Outputs A user-configurable bit which enables or disables the active ...

Page 9

The devices can be partially reconfigured while in opera- tion. Portions of the device not being modified remain operational during reconfiguration. Simultaneous configu- ration of more than one device is also possible. Full configuration takes as little as a millisecond, ...

Page 10

... ERR is also asserted for configuration file errors. The ERR function is optional and can be disabled during initial programming. AT6002 AT6003 64 I/O 64 I/O 80 I/O 80 I/O 96 I/O 108 I/O 95 I/O 120 I AT6002 2677 2677 2678 2678 2677 2678 AT6005 AT6010 64 I I/O - 108 I/O 108 I/O 108 I/O 120 I/O ...

Page 11

... Pinout Assignment AT6002 AT6003 AT6005 - - - I/O24( I/O30( I/O27( I/O29( I/O28(A) I/O26(A) I/O23( I/O27( I/O25( I/O22(B) I/O26(A) I/O24(A) I/O21( I/O25( I/O23( I/O20(B) I/O24(B) I/O22(A) I/O19( I/O23( I/O21( I/O18(B) I/O22(B) I/O20(A) I/O17( I/O21( I/O19( I/O16(B) I/O20(B) I/O18( I/O15( I/O19( I/O17( I/O18(B) I/O16(A) GND ...

Page 12

... Pinout Assignment (Continued) AT6002 AT6003 AT6005 I/O9(B) I/O11(B) I/O10( I/O8( I/O10( I/O9( I/O7(B) I/O9(B) I/O8( I/O6( I/O8( I/O7( I/O7(B) I/O6( GND GND GND - - - - - - I/O5( I/O6( I/O5( I/O4(B) I/O5(B) I/O4( I/O3( I/O4( I/O3( I/O2(B) I/O3(A) I/O2( I/O2(B) - I/O1( I/O1( I/O1( CCLK CCLK ...

Page 13

... Pinout Assignment AT6002 AT6003 AT6005 CON CON CON - - - I/O96(A) I/O120(A) I/O108(A) - I/O119( I/O118(A) I/O107(A) I/O95(A) or I/O117(A) or I/O106(A) or CSOUT CSOUT CSOUT - - - - - - I/O94(B) I/O116(A) I/O105(A) I/O93(A) I/O115(A) I/O104( I/O92(B) I/O114(B) I/O103(A) I/O91(A) or I/O113(A) or I/O102(A) or CHECK CHECK CHECK - - - I/O90(B) I/O112(B) I/O101(A) I/O89(A) or I/O111(A) or I/O100(A) or ...

Page 14

... Pinout Assignment (Continued) AT6002 AT6003 AT6005 - - - VCC VCC VCC I/O82(A) I/O102(A) I/O92(A) I/O81(B) I/O101(B) I/O91( I/O80(A) I/O100(A) I/O90(A) I/O79(B) I/O99(B) I/O89( I/O78(A) I/O98(A) I/O88(A) - I/O97(B) I/O87( GND GND GND - - - I/O77(A) I/O96(A) I/O86(A) I/O76(B) I/O95(B) I/O85( I/O75(A) I/O94(A) I/O84(A) I/O74(B) I/O93(A) I/O83(A) ...

Page 15

... Pinout Assignment AT6002 AT6003 AT6005 - - - I/O72(A) I/O90(A) I/O81(A) - I/O89(B) I/O80( I/O88(A) - I/O71(A) I/O87(A) I/O79( I/O70(B) I/O86(A) I/O78(A) I/O69(A) I/O85(A) I/O77( I/O68(B) I/O84(B) I/O76(A) I/O67(A) I/O83(A) I/O75( I/O66(B) I/O82(B) I/O74(A) I/O65(A) I/O81(A) I/O73(A) I/O64(B) I/O80(B) I/O72( I/O63(A) I/O79(A) I/O71(A - I/O78(B) I/O70(A) GND ...

Page 16

... Pinout Assignment (Continued) AT6002 AT6003 AT6005 I/O57(B) I/O71(B) I/O64( I/O56(A) I/O70(A) I/O63(A) I/O55(B) I/O69(B) I/O62( I/O54(A) I/O68(A) I/O61(A) - I/O67(B) I/O60( GND GND GND - - - - - - I/O53(A) I/O66(A) I/O59(A) I/O52(B) I/O65(B) I/O58( I/O51(A) I/O64(A) I/O57(A) I/O50(B) I/O63(A) I/O56( I/O62(B) - I/O49(A) I/O61(A) I/O55( Notes: 1. PWR = Pins connected to power plane = F1, E4/E5, L2, R4, K15, L12, E14, A12. ...

Page 17

... Pinout Assignment AT6002 AT6003 AT6005 I/O48(A) I/O60(A) I/O54(A) - I/O59( I/O58(A) I/O53(A) I/O47(A) I/O57(A) I/O52( I/O46(B) I/O56(A) I/O51(A) I/O45(A) I/O55(A) I/O50( I/O44(B) I/O54(B) I/O49(A) I/O43(A) I/O53(A) I/O48( I/O42(B) I/O52(B) I/O47(A) I/O41(A) I/O51(A) I/O46(A) I/O40(B) I/O50(B) I/O45( I/O39(A) I/O49(A) I/O44(A) - I/O48(B) I/O43(A) GND ...

Page 18

... Pinout Assignment (Continued) AT6002 AT6003 AT6005 I/O34(A) or A13 I/O42(A) or A13 I/O38(A) or A13 I/O33(B) I/O41(B) I/O37( I/O32(A) or A12 I/O40(A) or A12 I/O36(A) or A12 I/O31(B) I/O39(B) I/O35( I/O30(A) or A11 I/O38(A) or A11 I/O34(A) or A11 - I/O37(B) I/O33( GND GND GND - - - I/O29(A) or A10 I/O36(A) or A10 I/O32(A) or A10 ...

Page 19

... Buffer delay pad voltage of 1.5V with one output switching. 4. Max specifications are the average of mas t 5. Parameter based on characterization and simulation; not tested in production 6. Exact power calculation is available in an Atmel application note. 7. Load Definition Load of one input Load of one L input Constant Load Tester Load of 50 pF. = Preliminary Information ...

Page 20

... Max specifications are the average of mas t 5. Parameter based on characterization and simulation; not tested in production 6. Exact power calculation is available in an Atmel application note. 7. Load Definition Load of one input Load of one L input Constant Load Load of 28 Clock Columns Load of 28 Reset Columns Tester Load of 50 pF. ...

Page 21

... AT6002-2/4 AT6002-2/4 AT6003-2/4 AT6003-2/4 AT6005-2/4 AT6005-2/4 AT6010-2/4 AT6010-2/4 Industrial - - 125 C 5V ± 10% 2. 0.8V 70% - 100% V 70% - 100 30 30 (max (max) AT6002-2/4, AT6003-2/4 AT6005-2/4, AT6010-2/4 Commercial 3.3V ± 0.8V 70% - 100 30 (max) Military 5V ± 10 ...

Page 22

DC Characteristics – 5V Operation Symbol Parameter V High-level Input Voltage IH V Low-level Input Voltage IL V High-level Output Voltage OH V Low-level Output Voltage OL High-level Tristate I OZH Output Leakage Current High-level Tristate I OZL Output Leakage ...

Page 23

DC Characteristics – 3.3V Operation Symbol Parameter V High-level Input Voltage IH V Low-level Input Voltage IL V High-level Output Voltage OH V Low-level Output Voltage OL High-level Tristate I OZH Output Leakage Current High-level Tristate I OZL Output Leakage ...

Page 24

... Ordering Information – AT6002 Usable Speed Gates Grade (ns) Ordering Code 6,000 2 AT6002-2AC AT6002A-2AC AT6002-2JC AT6002-2QC AT6002-2AI AT6002A-2AI AT6002-2JI AT6002-2QI 6,000 4 AT6002-4AC AT6002A-4AC AT6002-4JC AT6002-4QC AT6002LV-4AC AT6002ALV-4AC AT6002LV-4JC AT6002LV-4QC AT6002-4AI AT6002A-4AI AT6002-4JI AT6002-4QI 84J 84-lead, Plastic J-leaded Chip Carrier (PLCC) 100A 100-lead, Very Thin (1.0 mm) Plastic Gull-Wing Quad Flat Package (VQFP) ...

Page 25

Ordering Information – AT6003 Usable Speed Gates Grade (ns) Ordering Code 9,000 2 AT6003-2AC AT6003A-2AC AT6003-2JC AT6003-2QC AT6003-2AI AT6003A-2AI AT6003-2JI AT6003-2QI 9,000 4 AT6003-4AC AT6003A-4AC AT6003-4JC AT6003-4QC AT6003LV-4AC AT6003ALV-4AC AT6003LV-4JC AT6003LV-4QC AT6003-4AI AT6003A-4AI AT6003-4JI AT6003-4QI 84J 84-lead, Plastic J-leaded Chip ...

Page 26

Ordering Information – AT6005 Usable Speed Gates Grade (ns) Ordering Code 15,000 2 AT6005-2AC AT6005A-2AC AT6005-2JC AT6005-2QC AT6005A-2QC AT6005-2AI AT6005A-2AI AT6005-2JI AT6005-2QI AT6005A-2QI 15,000 4 AT6005-4AC AT6005A-4AC AT6005-4JC AT6005-4QC AT6005A-4QC AT6005LV-4AC AT6005ALV-4AC AT6005LV-4JC AT6005LV-4QC AT6005ALV-4QC AT6005-4AI AT6005A-4AI AT6005-4JI AT6005-4QI AT6005A-4QI ...

Page 27

Ordering Information – AT6010 Usable Speed Gates Grade (ns) Ordering Code 30,000 2 AT6010-2JC AT6010A-2AC AT6010-2QC AT6010A-2QC AT6010H-2QC AT6010-2JI AT6010A-2AI AT6010-2QI AT6010A-2QI AT6010H-2QI 30,000 4 AT6010A-4AC AT6010-4QC AT6010-4JC AT6010A-4QC AT6010H-4QC AT6010ALV-4AC AT6010LV-4QC AT6010LV-4JC AT6010ALV-4QC AT6010HLV-4QC AT6010A-4AI AT6010-4QI AT6010-4JI AT6010A-4QI AT6010H-4QI ...

Page 28

... No licenses to patents or other intellectual prop- erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...

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