EP1C6Q240C8N Altera, EP1C6Q240C8N Datasheet - Page 58

IC CYCLONE FPGA 5980 LE 240-PQFP

EP1C6Q240C8N

Manufacturer Part Number
EP1C6Q240C8N
Description
IC CYCLONE FPGA 5980 LE 240-PQFP
Manufacturer
Altera
Series
Cyclone®r
Datasheet

Specifications of EP1C6Q240C8N

Number Of Logic Elements/cells
5980
Number Of Labs/clbs
598
Total Ram Bits
92160
Number Of I /o
185
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Family Name
Cyclone®
Number Of Logic Blocks/elements
5980
# I/os (max)
185
Frequency (max)
275.03MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
5980
Ram Bits
92160
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1813
EP1C6Q240C8N

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Cyclone Device Handbook, Volume 1
2–52
Preliminary
Notes to
(1)
(2)
(3)
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
LVDS
RSDS
SSTL-2 class I and II
SSTL-3 class I and II
Differential SSTL-2
Table 2–12. Cyclone I/O Standards
There is no megafunction support for EP1C3 devices for the PCI compiler. However, EP1C3 devices support PCI
by using the LVTTL 16-mA I/O standard and drive strength assignments in the Quartus II software. The device
requires an external diode for PCI compliance.
EP1C3 devices in the 100-pin TQFP package do not support the LVDS and RSDS I/O standards.
This I/O standard is only available on output clock pins (PLL_OUT pins). EP1C3 devices in the 100-pin package
do not support this I/O standard as it does not have PLL_OUT pins.
I/O Standard
(2)
(2)
Table
(1)
2–12:
(3)
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Differential
Differential
Voltage-referenced
Voltage-referenced
Differential
Advanced I/O Standard Support
Cyclone device IOEs support the following I/O standards:
Table 2–12
Cyclone devices contain four I/O banks, as shown in
banks 1 and 3 support all the I/O standards listed in
banks 2 and 4 support all the I/O standards listed in
3.3-V PCI standard. I/O banks 2 and 4 contain dual-purpose DQS, DQ,
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
LVDS
RSDS
SSTL-2 class I and II
SSTL-3 class I and II
Differential SSTL-2 class II (on output clocks only)
Type
describes the I/O standards supported by Cyclone devices.
Voltage (V
Input Reference
1.25
1.25
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.5
REF
) (V)
Voltage (V
Output Supply
3.3
2.5
1.8
1.5
3.3
2.5
2.5
2.5
3.3
2.5
CCIO
) (V)
Table 2–12
Table
Figure
Altera Corporation
Voltage (V
Termination
2–12. I/O
2–35. I/O
Board
1.25
1.25
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.5
except the
May 2008
TT
) (V)

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