EP1C6T144C6N Altera, EP1C6T144C6N Datasheet - Page 53
![IC CYCLONE FPGA 5980 LE 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EP1C6T144C6N
Manufacturer Part Number
EP1C6T144C6N
Description
IC CYCLONE FPGA 5980 LE 144-TQFP
Manufacturer
Altera
Series
Cyclone®r
Datasheet
1.EP1C3T144C8.pdf
(106 pages)
Specifications of EP1C6T144C6N
Number Of Logic Elements/cells
5980
Number Of Labs/clbs
598
Total Ram Bits
92160
Number Of I /o
98
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1815
EP1C6T144C6N
EP1C6T144C6N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1C6T144C6N
Manufacturer:
ALTERA
Quantity:
5
Company:
Part Number:
EP1C6T144C6N
Manufacturer:
ALTERA
Quantity:
885
Part Number:
EP1C6T144C6N
Manufacturer:
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Quantity:
20 000
Figure 2–33. Cyclone Device DQ and DQS Groups in ×8 Mode
Note to
(1)
Altera Corporation
May 2008
Each DQ group consists of one DQS pin, eight DQ pins, and one DM pin.
Figure
Top, Bottom, Left, or Right I/O Bank
2–33:
output pins (nSTATUS and CONF_DONE) and all the JTAG pins in I/O
bank 3 must operate at 2.5 V because the V
I/O banks 1, 2, 3, and 4 support DQS signals with DQ bus modes of × 8.
For × 8 mode, there are up to eight groups of programmable DQS and DQ
pins, I/O banks 1, 2, 3, and 4 each have two groups in the 324-pin and
400-pin FineLine BGA packages. Each group consists of one DQS pin, a
set of eight DQ pins, and one DM pin (see
drives the set of eight DQ pins within that group.
Table 2–10
EP1C3
EP1C4
Table 2–10. DQ Pin Groups (Part 1 of 2)
Device
DQ Pins
shows the number of DQ pin groups per device.
100-pin TQFP
144-pin TQFP
324-pin FineLine BGA
400-pin FineLine BGA
DQS Pin
Package
(1)
Note (1)
Number of × 8 DQ
Pin Groups
Figure
CCIO
3
4
8
8
level of SSTL-2 is 2.5 V.
2–33). Each DQS pin
DM Pin
Total DQ Pin
I/O Structure
Count
Preliminary
24
32
64
64
2–47