EP2C35F484I8 Altera, EP2C35F484I8 Datasheet - Page 40
![IC CYCLONE II FPGA 33K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2C35F484I8
Manufacturer Part Number
EP2C35F484I8
Description
IC CYCLONE II FPGA 33K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C35F484I8
Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
322
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
33216
# I/os (max)
322
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
33216
Ram Bits
483840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
For Use With
P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2108
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C35F484I8
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C35F484I8N
Manufacturer:
ALTERA
Quantity:
1 045
Part Number:
EP2C35F484I8N
Manufacturer:
ALTERA
Quantity:
20 000
Embedded Memory
2–28
Cyclone II Device Handbook, Volume 1
Each M4K block can implement various types of memory with or without
parity, including true dual-port, simple dual-port, and single-port RAM,
ROM, and first-in first-out (FIFO) buffers. The M4K blocks support the
following features:
■
■
■
■
■
■
■
■
■
■
■
■
1
Table 2–5
in each Cyclone II device.
EP2C5
EP2C8
EP2C15
EP2C20
EP2C35
EP2C50
EP2C70
Table 2–5. M4K Memory Capacity & Distribution in Cyclone II Devices
4,608 RAM bits
250-MHz performance
True dual-port memory
Simple dual-port memory
Single-port memory
Byte enable
Parity bits
Shift register
FIFO buffer
ROM
Various clock modes
Address clock enable
Device
Violating the setup or hold time on the memory block address
registers could corrupt memory contents. This applies to both
read and write operations.
shows the capacity and distribution of the M4K memory blocks
M4K Columns
2
2
2
2
3
3
5
M4K Blocks
105
129
250
26
36
52
52
Altera Corporation
Total RAM Bits
February 2007
1,152,000
119,808
165,888
239,616
239,616
483,840
594,432