EP20K60EQC240-1 Altera, EP20K60EQC240-1 Datasheet - Page 13
![IC APEX 20KE FPGA 600K 240PQFP](/photos/6/72/67260/544-240-pqfp_sml.jpg)
EP20K60EQC240-1
Manufacturer Part Number
EP20K60EQC240-1
Description
IC APEX 20KE FPGA 600K 240PQFP
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K60EQC240-1
Number Of Logic Elements/cells
2560
Number Of Labs/clbs
2560
Total Ram Bits
32768
Number Of I /o
151
Number Of Gates
162000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Altera Corporation
Figure 5. APEX 20K Logic Element
labclkena2
data1
data2
data3
data4
Chip-Wide
labclkena1
labclk1
labclk2
labclr1
labclr2
Reset
Look-Up
Asynchronous
Clear/Preset/
(LUT)
Table
Load Logic
Clock &
Clock Enable
Select
Carry-Out
Carry-In
Chain
Carry
Logic Element
The LE, the smallest unit of logic in the APEX 20K architecture, is compact
and provides efficient logic usage. Each LE contains a four-input LUT,
which is a function generator that can quickly implement any function of
four variables. In addition, each LE contains a programmable register and
carry and cascade chains. Each LE drives the local interconnect, MegaLAB
interconnect, and FastTrack Interconnect routing structures. See
Each LE’s programmable register can be configured for D, T, JK, or SR
operation. The register’s clock and clear control signals can be driven by
global signals, general-purpose I/O pins, or any internal logic. For
combinatorial functions, the register is bypassed and the output of the
LUT drives the outputs of the LE.
Cascade-In
Cascade
Chain
Cascade-Out
Synchronous
LAB-wide
Load
Synchronous
Load & Clear
Logic
APEX 20K Programmable Logic Device Family Data Sheet
Synchronous
LAB-wide
Clear
D
ENA
CLRN
PRN
Register Bypass
Packed
Register Select
Q
Register
Programmable
To F astTrack Interconnect,
MegaLAB Interconnect,
or Local Interconnect
To F astTrack Interconnect,
MegaLAB Interconnect,
or Local Interconnect
Figure
13
5.