EPF10K50VRC240-3N Altera, EPF10K50VRC240-3N Datasheet - Page 23
![IC FLEX 10KV FPGA 50K 240-RQFP](/photos/6/70/67070/544-240-rqfp_sml.jpg)
EPF10K50VRC240-3N
Manufacturer Part Number
EPF10K50VRC240-3N
Description
IC FLEX 10KV FPGA 50K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K50VRC240-3N
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
20480
Number Of I /o
189
Number Of Gates
116000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-RQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K50VRC240-3N
Manufacturer:
ALTERA21
Quantity:
201
Altera Corporation
Figure 10. LE Clear & Preset Modes
Chip-Wide Reset
Chip-Wide Reset
Asynchronous Clear
(Asynchronous
(Asynchronous
Asynchronous Load with Clear
Asynchronous Load with Preset
labctrl1 or
(Preset)
labctrl2
labctrl2
labctrl2
labctrl1
labctrl1
(Clear)
(Data)
(Data)
data3
data3
Load)
Load)
NOT
NOT
D
CLRN
VCC
PRN
NOT
NOT
Q
Asynchronous Clear
The flipflop can be cleared by either LABCTRL1 or LABCTRL2. In this
mode, the preset signal is tied to V
Chip-Wide Reset
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Chip-Wide Reset
Asynchronous Preset
labctrl1 or
labctrl2
D
CLRN
PRN
Q
VCC
D
CLRN
PRN
D
CLRN
PRN
(Asynchronous
Q
Asynchronous Load without Clear or Preset
Q
CC
labctrl1
(Data)
Load)
data3
to deactivate it.
Chip-Wide Reset
Chip-Wide Reset
NOT
NOT
Asynchronous Clear & Preset
labctrl1
labctrl2
D
CLRN
PRN
D
CLRN
PRN
Q
Q
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