EPF10K50VRC240-3 Altera, EPF10K50VRC240-3 Datasheet - Page 13
![IC FLEX 10KV FPGA 50K 240-RQFP](/photos/6/70/67070/544-240-rqfp_sml.jpg)
EPF10K50VRC240-3
Manufacturer Part Number
EPF10K50VRC240-3
Description
IC FLEX 10KV FPGA 50K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K50VRC240-3
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
20480
Number Of I /o
189
Number Of Gates
116000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-RQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1948
EPF10K50VRC240-3
EPF10K50VRC240-3
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K50VRC240-3
Manufacturer:
ALTERA
Quantity:
12 388
Company:
Part Number:
EPF10K50VRC240-3
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EPF10K50VRC240-3
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EPF10K50VRC240-3N
Manufacturer:
ALTERA21
Quantity:
201
Altera Corporation
Figure 5. FLEX 10K LAB
Notes:
(1)
(2)
LAB Local
Interconnect (2)
EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
22 inputs to the LAB local interconnect channel from the row; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V,
and EPF10K250A devices have 26.
EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
30 LAB local interconnect channels; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V, and EPF10K250A devices
have 34 LABs.
LAB Control
Signals
(1)
Logic Array Block
Each LAB consists of eight LEs, their associated carry and cascade chains,
LAB control signals, and the LAB local interconnect. The LAB provides
the coarse-grained structure to the FLEX 10K architecture, facilitating
efficient routing with optimum device utilization and high performance.
See
4
4
4
4
4
4
4
4
4
8
Figure
Dedicated Inputs &
Global Signals
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
5.
4
6
Carry-In &
Cascade-In
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
2
2
Row Interconnect
Carry-Out &
Cascade-Out
8
16
24
8
4
16
See Figure 11
for details.
Column
Interconnect
Column-to-Row
Interconnect
13