EP1S10F780C6 Altera, EP1S10F780C6 Datasheet - Page 60
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EP1S10F780C6
Manufacturer Part Number
EP1S10F780C6
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S10F780C6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1111
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TriMatrix Memory
2–46
Stratix Device Handbook, Volume 1
Input/Output Clock Mode
Input/output clock mode can be implemented for both the true and
simple dual-port memory modes. On each of the two ports, A or B, one
clock controls all registers for inputs into the memory block: data input,
wren, and address. The other clock controls the block’s data output
registers. Each memory block port, A or B, also supports independent
clock enables and asynchronous clear signals for input and output
registers.
clock mode.
Figures 2–25
and
2–26
show the memory block in input/output
Altera Corporation
July 2005