EP1S10F484C5 Altera, EP1S10F484C5 Datasheet - Page 176

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484C5

Manufacturer Part Number
EP1S10F484C5
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S10F484C5

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
500MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Operating Conditions
4–6
Stratix Device Handbook, Volume 1
V
V
Table 4–10. 3.3-V LVDS I/O Specifications (Part 1 of 2)
CCIO
ID
Symbol
(6)
I/O supply voltage
Input differential voltage
swing (single-ended)
Parameter
Figure 4–2. Transmitter Output Waveforms for Differential I/O Standards
Tables 4–10
DC operating conditions, and capacitance for 1.5-V Stratix
devices.
Single-Ended Waveform
Differential Waveform
0.1 V ≤ V
W = 1 through 10
1.1 V ≤ V
W = 1
1.1 V ≤ V
W = 2 through10
1.6 V < V
W = 1 through 10
through
V
CM
Conditions
V
CM
CM
CM
OD
CM
4–33
< 1.1 V
≤ 1.6 V
≤ 1.6 V
≤ 1.8 V
recommend operating conditions,
V
OD
Minimum
3.135
300
200
100
300
Typical
3.3
V
OD
p − n = 0 V
Positive Channel (p) = V
Negative Channel (n) = V
Ground
Maximum
Altera Corporation
3.465
1,000
1,000
1,000
1,000
January 2006
Unit
mV
mV
mV
mV
V
OH
OL

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