EP4CGX150CF23I7 Altera, EP4CGX150CF23I7 Datasheet - Page 15
EP4CGX150CF23I7
Manufacturer Part Number
EP4CGX150CF23I7
Description
IC CYCLONE IV FPGA 150K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CGX150CF23I7
Number Of Logic Elements/cells
149760
Number Of Labs/clbs
9360
Total Ram Bits
6480000
Number Of I /o
270
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4CGX150CF23I7
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP4CGX150CF23I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Cyclone IV Device Datasheet
Power Consumption
Table 1–20. Differential I/O Standard Specifications for Cyclone IV Devices
Power Consumption
© December 2010 Altera Corporation
mini
(Row I/Os)
(5)
mini
(Column
I/Os)
RSDS
I/Os)(5)
RSDS
(Column
I/Os)
PPDS (Row
I/Os)
PPDS
(Column
I/Os)
Notes to
(1) For an explanation of terms used in
(2) V
(3) R
(4) There are no fixed V
(5) The Mini
(6) The LVPECL I/O standard is only supported on dedicated clock input pins. This I/O standard is not supported for output pins.
I/O Standard
- LVDS
- LVDS
IN
(5)
(5)
(5)
(5)
L
®
range: 90 R
range: 0 V V
(Row
Table
-
LVDS, RSDS, and PPDS standards are only supported at the output pins.
f
1–20:
2.375
2.375
2.375
2.375
2.375
2.375
Min
L
IN
110 .
IN
1.85 V.
, V
Use the following methods to estimate power for a design:
■
■
The interactive Excel-based EPE is used prior to designing the device to get a
magnitude estimate of the device power. The Quartus II PowerPlay power analyzer
provides better quality estimates based on the specifics of the design after
place-and-route is complete. The PowerPlay power analyzer can apply a combination
of user-entered, simulation-derived, and estimated signal activities that, combined
with detailed circuit models, can yield very accurate power estimates.
For more information about power estimation tools, refer to the
User Guide
Handbook.
V
OD
CCIO
Typ
2.5
2.5
2.5
2.5
2.5
2.5
, and V
the Excel-based EPE
the Quartus
(V)
OS
2.625
2.625
2.625
2.625
2.625
2.625
Max
Table
specifications for BLVDS. They depend on the system topology.
and the
1–20, refer to
Min
—
—
—
—
—
—
V
II PowerPlay power analyzer feature
ID
(mV)
PowerPlay Power Analysis
Max
—
—
—
—
—
—
“Glossary” on page
Min
—
—
—
—
—
—
V
Condition
IcM
1–38.
—
—
—
—
—
—
(V)
(2)
chapter in volume 3 of the Quartus II
(Note 1)
Max
(Part 2 of 2)—Preliminary
—
—
—
—
—
—
Cyclone IV Device Handbook, Volume 3
Min
300
300
100
100
100
100
V
OD
Early Power Estimator
(mV)
200
200
200
200
Typ
—
—
(3)
Max
600
600
600
600
600
600
Min
1.0
1.0
0.5
0.5
0.5
0.5
V
1–15
OS
Typ
(V)
1.2
1.2
1.2
1.2
1.2
1.2
(3)
Max
1.4
1.4
1.5
1.5
1.4
1.4