EP3C120F780I7 Altera, EP3C120F780I7 Datasheet - Page 66
![IC CYCLONE III FPGA 120K 780FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP3C120F780I7
Manufacturer Part Number
EP3C120F780I7
Description
IC CYCLONE III FPGA 120K 780FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C120F780I7.pdf
(274 pages)
Specifications of EP3C120F780I7
Number Of Logic Elements/cells
119088
Number Of Labs/clbs
7443
Total Ram Bits
3981312
Number Of I /o
531
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
119088
# I/os (max)
531
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
119088
Ram Bits
3981312
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FBGA
For Use With
544-2589 - KIT DEV EMB CYCLONE III EDITION544-2566 - KIT DEV DSP CYCLONE III EDITION544-2444 - KIT DEV CYCLONE III EP3C120
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C120F780I7
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP3C120F780I7N
Manufacturer:
ALTERA
Quantity:
118
2–22
Table 2–32. FPGA Sampling Window (SW) Requirement—Read Side
Cyclone III Device Handbook, Volume 2
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
DDR2 SDRAM
DDR SDRAM
QDRII SRAM
Note to
(1) Column I/Os refer to top and bottom I/Os. Row I/Os refer to right and left I/Os. Wraparound mode refers to the combination of column and row
I/Os.
Memory Standard
Table
2–32:
f
Table 2–31. Cyclone III LS Devices LVDS Receiver Timing Specifications
External Memory Interface Specifications
Cyclone III LS devices support external memory interfaces up to 200 MHz. The
external memory interfaces for Cyclone III LS devices are auto-calibrating and easy to
implement.
Table 2–32
Cyclone III LS devices and are useful when performing memory interface timing
analysis.
For more information about external memory system specifications, refer to the
External Memory Interface
(Part 2 of 2) (Preliminary)
Input jitter
tolerance
t
Notes to
(1) True LVDS receiver is supported at all banks.
(2) t
LOCK
(2)
LOC K
Symbol
Table
is the time required for the PLL to lock from the end of device configuration.
and
Setup
1050
705
675
900
785
800
765
745
945
2–31:
Column I/Os (ps)
Table 2–33
Modes
—
—
Hold
650
620
845
720
740
990
710
690
890
Handbook.
list the external memory interface specifications for
C7
C8
I7
Min
—
—
Setup
1065
C7 and I7
770
795
910
930
915
855
880
955
(Note 1)
Row I/Os (ps)
Max
500
1
(Preliminary)
Hold
1005
715
740
855
870
855
800
825
900
Chapter 2: Cyclone III LS Device Data Sheet
© December 2009 Altera Corporation
Min
—
—
Wraparound Mode (ps)
(Note 1)
Setup
1185
1210
1040
1000
1085
1115
1130
C8
985
970
Switching Characteristics
Max
550
1
1030
1055
1125
1150
1075
Hold
930
915
985
945
Unit
ps
ps