EP3SL150F780C2N Altera, EP3SL150F780C2N Datasheet - Page 34

• Manufacturer Part Number: EP3SL150F780C2N
• Description: IC STRATIX III FPGA 150K 780FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F780C2N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 488
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Stratix III
• Number Of Logic Blocks/elements: 142500
• # I/os (max): 488
• Frequency (max): 600MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.1V
• Logic Cells: 142500
• Ram Bits: 6543360
• Operating Supply Voltage (min): 1.05V
• Operating Supply Voltage (max): 1.15V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2405; EP3SL150F780C2NES

1–34
Table 1–37. Output Timing Measurement Methodology for Output Pins (Part 1 of 3)
Stratix III Device Handbook, Volume 2
3.3-V LVTTL
3.3-V LVCMOS
3.0-V LVTTL
3.0-V LVCMOS
2.5-V
1.8-V
1.5-V
1.2-V
PCI
PCI-X
SSTL-2 CLASS I
SSTL-2 CLASS II
SSTL-18 CLASS I
SSTL-18 CLASS II
SSTL-15 CLASS I
SSTL-15 CLASS II
1.8-V HSTL CLASS I
1.8-V HSTL
CLASS II
1.5-V HSTL CLASS I
1.5-V HSTL
CLASS II
1.2-V HSTL CLASS I
1.2-V HSTL
CLASS II
Differential SSTL-2
CLASS I
Differential SSTL-2
CLASS II
Differential SSTL-18
CLASS I
Differential SSTL-18
CLASS II
1.8-V Differential
HSTL CLASS I
1.8-V Differential
HSTL CLASS II
1.5-V Differential
HSTL CLASS I
I/O Standard
—
—
—
—
—
—
—
—
—
—
25
25
25
25
25
25
—
—
—
—
—
—
25
25
25
25
—
—
—
R
S
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
R
D
—
—
—
—
—
—
—
—
—
—
50
25
50
25
50
25
50
25
50
25
50
25
50
25
50
25
50
25
50
R
T
Loading and Termination
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
R
P
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
3.135
3.135
2.375
1.425
1.375
1.375
1.375
1.375
2.325
2.325
1.375
2.325
2.325
2.85
2.85
1.71
1.14
2.85
2.85
1.66
1.66
1.09
1.09
1.66
1.66
1.66
1.66
1.66
1.66
V
CCIO
3.135
3.135
2.375
2.375
2.375
2.375
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
V
2.85
2.85
2.85
2.85
CCPD
1.05
1.05
1.05
1.05
1.05
1.05
1.05
1.05
1.05
1.05
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
V
CC
1.25
1.25
0.90
0.90
0.75
0.75
0.90
0.90
0.75
0.75
0.60
0.60
1.25
1.25
0.90
0.90
0.90
0.90
0.75
V
—
—
—
—
—
—
—
—
—
—
TT
© July 2010 Altera Corporation
C
L
10
10
(pF)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Measurement
V
1.5675
1.5675
1.1875
0.7125
1.1625
1.1625
0.6875
0.6875
0.6875
0.6875
1.1625
1.1625
0.6875
Point
1.425
1.425
0.855
1.425
1.425
0.545
0.545
MEAS
0.57
0.83
0.83
0.83
0.83
0.83
0.83
0.83
0.83
I/O Timing
(v)