XCV150-4FG456I Xilinx Inc, XCV150-4FG456I Datasheet - Page 31
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XCV150-4FG456I
Manufacturer Part Number
XCV150-4FG456I
Description
IC FPGA 2.5V I-TEMP 456-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™r
Datasheet
1.XCV100-5PQ240C.pdf
(76 pages)
Specifications of XCV150-4FG456I
Number Of Logic Elements/cells
3888
Number Of Labs/clbs
864
Total Ram Bits
49152
Number Of I /o
260
Number Of Gates
164674
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
456-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XCV150-4FG456I
Manufacturer:
XILINX
Quantity:
20 000
IOB Input Switching Characteristics Standard Adjustments
IOB Output Switching Characteristics
Output delays terminating at a pad are specified for LVTTL with 12 mA drive and fast slew rate. For other standards, adjust
the delays with the values shown in IOB Output Switching Characteristics Standard
DS003-3 (v3.2) September 10, 2002
Production Product Specification
Notes:
1.
Propagation Delays
O input to Pad
O input to Pad via transparent latch
3-State Delays
T input to Pad high-impedance
T input to valid data on Pad
T input to Pad high-impedance via
transparent latch
T input to valid data on Pad via
transparent latch
GTS to Pad high impedance
Sequential Delays
Clock CLK
Minimum Pulse Width, High
Minimum Pulse Width, Low
Data Input Delay Adjustments
Standard-specific data input delay
adjustments
Input timing for LVTTL is measured at 1.4 V. For other I/O standards, see
R
Description
Description
(1)
(1)
(1)
T
T
T
T
Symbol
ILVCMOS2
T
T
T
T
T
IPCI33_3
IPCI33_5
IPCI66_3
T
T
T
ISSTL2
ISSTL3
ILVTTL
IGTLP
IHSTL
IAGP
IGTL
ICTT
T
T
Symbol
T
T
T
IOTLPON
IOTLPHZ
T
T
IOTON
IOOLP
IOTHZ
T
T
PCI, 33 MHz, 3.3 V
PCI, 33 MHz, 5.0 V
PCI, 66 MHz, 3.3 V
IOOP
www.xilinx.com
GTS
1-800-255-7778
CH
CL
Standard
LVCMOS2
SSTL2
SSTL3
LVTTL
GTL+
HSTL
AGP
GTL
CTT
(1)
Min
1.2
1.4
1.0
1.4
1.2
1.6
2.5
0.8
0.8
Table
Virtex™ 2.5 V Field Programmable Gate Arrays
3.
–0.02
–0.05
–0.05
–0.04
–0.02
–0.03
0.13
0.10
0.06
0.02
0.01
Min
0
2.9
3.4
2.0
3.1
2.4
3.5
4.9
1.5
1.5
Speed Grade
-6
–0.04
–0.11
–0.11
–0.08
–0.04
–0.06
0.25
0.20
0.11
0.03
0.02
Speed Grade
Adjustments, page
-6
0
3.2
3.7
2.2
3.3
2.6
3.8
5.5
1.7
1.7
-5
–0.04
–0.12
–0.12
–0.09
–0.05
–0.07
0.28
0.23
0.12
0.03
0.02
-5
0
3.5
4.0
2.4
3.7
3.0
4.2
6.3
2.0
2.0
-4
–0.05
–0.14
–0.14
–0.10
–0.06
–0.08
0.33
0.26
0.14
0.04
0.02
-4
0
9.
Module 3 of 4
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7