XC6SLX150-3FGG900C Xilinx Inc, XC6SLX150-3FGG900C Datasheet - Page 17
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XC6SLX150-3FGG900C
Manufacturer Part Number
XC6SLX150-3FGG900C
Description
IC FPGA SPARTAN 6 147K 900FGGBGA
Manufacturer
Xilinx Inc
Series
Spartan® 6 LXr
Specifications of XC6SLX150-3FGG900C
Number Of Logic Elements/cells
147443
Number Of Labs/clbs
11519
Total Ram Bits
4939776
Number Of I /o
576
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
900-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC6SLX150-3FGG900C
Manufacturer:
XILINX
Quantity:
493
Company:
Part Number:
XC6SLX150-3FGG900C
Manufacturer:
Xilinx Inc
Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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Performance Characteristics
This section provides the performance characteristics of some common functions and designs implemented in
Spartan-6 devices. The numbers reported here are worst-case values; they have all been fully characterized. These values
are subject to the same guidelines as the
Table 25: Interface Performances
DS162 (v2.0) March 31, 2011
Preliminary Product Specification
Notes:
1.
2.
3.
4.
Networking Applications
SDR LVDS transmitter or receiver
DDR LVDS transmitter or receiver
SDR LVDS transmitter
DDR LVDS transmitter
SDR LVDS receiver
DDR LVDS receiver
Memory Interfaces (Implemented using the Spartan-6 FPGA Memory Controller Block)
Standard Performance (Standard V
DDR
DDR2
DDR3
LPDDR (Mobile_DDR)
Extended Performance (Requires Extended Memory Controller Block V
DDR2
DDR3
Refer to XAPP1064, Source-Synchronous Serialization and Deserialization (up to 1050 Mb/s) and UG381, Spartan-6 FPGA SelectIO
Resources User Guide.
Refer to UG388, Spartan-6 FPGA Memory Controller User Guide.
Extended Memory Controller block performance for DDR2 and DDR3 can be achieved using the extended MCB performance V
from
The -3N speed grade does not support a Memory Controller block.
Table
Description
2.
(1)
ISERDES2 in RETIMED mode
ISERDES2 in RETIMED mode
CCINT
ODDR2/IDDR2 register
)
IOB SDR register
I/O Resource
Switching Characteristics, page
OSERDES2
OSERDES2
www.xilinx.com
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
2 BUFIO2s
2 BUFIO2s
2 BUFGs
BUFPLL
BUFPLL
Buffer
Clock
BUFG
CCINT
18.
)
(3)
Width
Data
4-8
4-8
4-8
4-8
–
–
2
3
2
3
2
3
2
3
(2)
1080
1080
1080
1080
400
800
500
750
500
750
500
750
500
750
400
667
667
400
800
800
-3
Note 4
Note 4
Note 4
Note 4
Note 4
Note 4
Speed Grade
1050
1050
1050
1050
400
-3N
800
500
750
500
750
500
750
500
750
375
750
500
750
950
500
750
950
500
750
950
500
750
950
400
625
625
400
667
667
-2
250
500
500
500
500
500
350
400
350
-1L
—
—
—
—
—
—
—
—
—
—
—
CCINT
Units
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
range
17