XCV200E-7PQ240I Xilinx Inc, XCV200E-7PQ240I Datasheet - Page 10

• Manufacturer Part Number: XCV200E-7PQ240I
• Description: IC FPGA 1.8V I-TEMP 240-PQFP
• Manufacturer: Xilinx Inc
• Series: Virtex™-Er

Specifications of XCV200E-7PQ240I

• Number Of Logic Elements/cells: 5292
• Number Of Labs/clbs: 1176
• Total Ram Bits: 114688
• Number Of I /o: 158
• Number Of Gates: 306393
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 240-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex™-E 1.8 V Field Programmable Gate Arrays
Storage Elements
The storage elements in the Virtex-E slice can be config-
ured either as edge-triggered D-type flip-flops or as
level-sensitive latches. The D inputs can be driven either by
Module 2 of 4
4
G2
G1
G4
G3
F2
F1
BX
BY
F4
F3
F5IN
CLK
G4
G3
G2
G1
BY
BX
SR
CE
F4
F3
F2
F1
LUT
LUT
Carry &
Carry &
Control
Control
COUT
CIN
Figure 5: Detailed View of Virtex-E Slice
WE
CK
A4
I3
I2
I1
I0
I3
I2
I1
I0
WSO
WSH
WE
WE
Figure 4: 2-Slice Virtex-E CLB
LUT
LUT
D
CE
D
CE
RC
RC
BX
SP
Slice 1
SP
BY DG
Q
Q
DI
DI
DI
O
O
www.xilinx.com
0
1
0
1
YB
YQ
XB
XQ
X
Y
COUT
CY
CY
G4
G3
G2
G1
F2
F1
F4
F3
BX
CIN
BY
the function generators within the slice or directly from slice
inputs, bypassing the function generators.
In addition to Clock and Clock Enable signals, each Slice
has synchronous set and reset signals (SR and BY). SR
F5
LUT
F6
LUT
Carry &
Control
Carry &
Control
COUT
CIN
CE
CE
D
D
REV
REV
INIT
INIT
ds022_05_092000
Q
Q
Production Product Specification
D
CE
D
CE
DS022-2 (v2.8) January 16, 2006
RC
SP
RC
SP
Slice 0
ds022_04_121799
Q
Q
YB
YQ
F5
X
XQ
Y
XB
XB
YQ
X
XQ
YB
Y
R