XC5VLX85T-3FF1136C Xilinx Inc, XC5VLX85T-3FF1136C Datasheet - Page 292
![IC FPGA VIRTEX-5 85K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX85T-3FF1136C
Manufacturer Part Number
XC5VLX85T-3FF1136C
Description
IC FPGA VIRTEX-5 85K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX85T-3FF1136C
Number Of Logic Elements/cells
82944
Number Of Labs/clbs
6480
Total Ram Bits
3981312
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
122-1586 - BOARD EVAL FOR VIRTEX-5 ML555HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Part Number
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Part Number:
XC5VLX85T-3FF1136C
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Chapter 6: SelectIO Resources
X-Ref Target - Figure 6-84
X-Ref Target - Figure 6-85
292
DIFF_SSTL18_II_DCI
DIFF_SSTL18_II_DCI
DIFF_SSTL18_II_DCI
DCI
External Termination
DIFF_SSTL18_II
DIFF_SSTL18_II
DIFF_SSTL18_II
R 0 = 20
R 0 = 20
Figure 6-85: Differential SSTL (1.8V) Class II with DCI Bidirectional Termination
Ω
Ω
+
–
Figure 6-84: Differential SSTL (1.8V) Class II with Bidirectional Termination
+
–
2R
2R
2R
2R
Figure 6-84
differential SSTL Class II (1.8V) with bidirectional termination.
Figure 6-85
differential SSTL Class II (1.8V) with bidirectional DCI termination.
VRN
VRP
VRN
VRP
IOB
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
V
V
shows a sample circuit illustrating a valid termination technique for
shows a sample circuit illustrating a valid termination technique for
CCO
CCO
20Ω
20Ω
= 1.8V
= 1.8V
V
V
TT
TT
IOB
= 0.9V
= 0.9V
www.xilinx.com
50Ω
50Ω
Z 0
Z 0
Z 0
Z 0
V
TT
50Ω
V
50Ω
TT
IOB
= 0.9V
V
CCO
= 0.9V
V
CCO
= 1.8V
2R
2R
2R
2R
= 1.8V
VRP
VRN
VRP
VRN
20Ω
20Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
IOB
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DIFF_SSTL18_II_DCI
DIFF_SSTL18_II_DCI
DIFF_SSTL18_II_DCI
DIFF_SSTL18_II
DIFF_SSTL18_II
DIFF_SSTL18_II
+
–
R 0 = 20
+
–
ug190_6_79_091807
R 0 = 20
ug190_6_80_030506
Ω
Ω
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