AT40K05LV-3AJI Atmel, AT40K05LV-3AJI Datasheet - Page 66
![IC FPGA 3.3V 256 CELL 84-PLCC](/photos/6/70/67047/453-84-plcc_sml.jpg)
AT40K05LV-3AJI
Manufacturer Part Number
AT40K05LV-3AJI
Description
IC FPGA 3.3V 256 CELL 84-PLCC
Manufacturer
Atmel
Series
AT40K/KLVr
Datasheet
1.AT40K05-2BQC.pdf
(67 pages)
Specifications of AT40K05LV-3AJI
Number Of Logic Elements/cells
256
Total Ram Bits
2048
Number Of I /o
62
Number Of Gates
10000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
Other names
AT40K05LV3AJI
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352C1 – SBGA
66
Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing
A1 BALL CORNER
R
AT40K/AT40KLV Series FPGA
2. JEDEC variations are based on fully populated ball arrays. Arrays
A
2325 Orchard Parkway
San Jose, CA 95131
MO-192, Variation BAR-2, for additional information.
can be depopulated as desired by removing balls from the fully populated
array.
A1
E
A2
Top View
Side View
A1 BALL I.D.
D
TITLE
352C1, 352-ball, 35 x 35, Enhanced, Low-profile
Square Ball Grid Array Package (SBGA)
SEATING PLANE
b∅
e
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Section View
Matrix Size
SYMBOL
Bottom View
A1
A2
b
D
E
A
e
∅
Die Side
COMMON DIMENSIONS
MIN
0.35
0.25
0.60
(Unit of Measure = mm)
–
35.0 BSC
35.0 BSC
1.27 BSC
26 x 26
NOM
e
0.75
AA
AB
AC
AD
AE
AF
W
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
Y
–
–
–
DRAWING NO.
A1 BALL
CORNER
352C1
MAX
1.70
1.10
0.90
–
0896C–FPGA–04/02
NOTE
3/29/02
REV.
A
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