XC4020E-1PG223C Xilinx Inc, XC4020E-1PG223C Datasheet - Page 59

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XC4020E-1PG223C

Manufacturer Part Number
XC4020E-1PG223C
Description
IC FPGA C-TEMP 5V 1SPD 223-CPGA
Manufacturer
Xilinx Inc
Series
XC4000E/Xr
Datasheet

Specifications of XC4020E-1PG223C

Number Of Logic Elements/cells
1862
Number Of Labs/clbs
784
Total Ram Bits
25088
Number Of I /o
192
Number Of Gates
20000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
223-BCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC4020E-1PG223C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Figure 55: Master Parallel Mode Programming Switching Characteristics
May 14, 1999 (Version 1.6)
Notes: 1. At power-up, Vcc must rise from 2.0 V to Vcc min in less than 25 ms, otherwise delay configuration by pulling PROGRAM
This timing diagram shows that the EPROM requirements are extremely relaxed. EPROM access time can be longer than
500 ns. EPROM data output has no hold-time requirements.
(output)
(output)
(output)
(output)
A0-A17
D0-D7
DOUT
RCLK
CCLK
RCLK
2. The first Data byte is loaded and CCLK starts at the end of the first RCLK active cycle (rising edge).
Low until Vcc is valid.
R
Delay to Address valid
Data setup time
Data hold time
Product Obsolete or Under Obsolescence
Description
XC4000E and XC4000X Series Field Programmable Gate Arrays
Address for Byte n
1
2
3
Symbol
7 CCLKs
T
T
T
DRC
RCD
RAC
2 T
Byte
DRC
Min
60
0
0
Byte n - 1
D6
Address for Byte n + 1
1 T
3 T
CCLK
RAC
Max
RCD
200
D7
Units
ns
ns
ns
X6078
6-63
6

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