XC4028XL-2HQ208I Xilinx Inc, XC4028XL-2HQ208I Datasheet - Page 27
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XC4028XL-2HQ208I
Manufacturer Part Number
XC4028XL-2HQ208I
Description
IC FPGA I-TEMP 3.3V 2SPD 208HQFP
Manufacturer
Xilinx Inc
Series
XC4000E/Xr
Datasheet
1.XC4005E-4PC84C.pdf
(68 pages)
Specifications of XC4028XL-2HQ208I
Number Of Logic Elements/cells
2432
Number Of Labs/clbs
1024
Total Ram Bits
32768
Number Of I /o
160
Number Of Gates
28000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC4028XL-2HQ208I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Double-Length Lines
The double-length lines consist of a grid of metal segments,
each twice as long as the single-length lines: they run past
two CLBs before entering a switch matrix. Double-length
lines are grouped in pairs with the switch matrices stag-
gered, so that each line goes through a switch matrix at
every other row or column of CLBs (see
There are four vertical and four horizontal double-length
lines associated with each CLB. These lines provide faster
signal routing over intermediate distances, while retaining
routing flexibility. Double-length lines are connected by way
of the programmable switch matrices. Routing connectivity
is shown in
Quad Lines (XC4000X only)
XC4000X devices also include twelve vertical and twelve
horizontal quad lines per CLB row and column. Quad lines
are four times as long as the single-length lines. They are
interconnected via buffered switch matrices (shown as dia-
monds in
CLBs before entering a buffered switch matrix. They are
grouped in fours, with the buffered switch matrices stag-
gered, so that each line goes through a buffered switch
matrix at every fourth CLB location in that row or column.
(See
The buffered switch matrixes have four pins, one on each
edge. All of the pins are bidirectional. Any pin can drive any
or all of the other pins.
Each buffered switch matrix contains one buffer and six
pass transistors. It resembles the programmable switch
matrix shown in
mable buffer. There can be up to two independent inputs
May 14, 1999 (Version 1.6)
Figure 28: Single- and Double-Length Lines, with
Programmable Switch Matrices (PSMs)
CLB
CLB
CLB
Figure
Figure 27 on page
Figure
29.)
PSM
PSM
R
Figure
27.
26, with the addition of a program-
CLB
CLB
CLB
Product Obsolete or Under Obsolescence
30). Quad lines run past four
PSM
PSM
XC4000E and XC4000X Series Field Programmable Gate Arrays
Figure
CLB
CLB
CLB
28).
Doubles
Singles
Doubles
X6601
and up to two independent outputs. Only one of the inde-
pendent inputs can be buffered.
The place and route software automatically uses the timing
requirements of the design to determine whether or not a
quad line signal should be buffered. A heavily loaded signal
is typically buffered, while a lightly loaded one is not. One
scenario is to alternate buffers and pass transistors. This
allows both vertical and horizontal quad lines to be buffered
at alternating buffered switch matrices.
Due to the buffered switch matrices, quad lines are very
fast. They provide the fastest available method of routing
heavily loaded signals for long distances across the device.
Longlines
Longlines form a grid of metal interconnect segments that
run the entire length or width of the array. Longlines are
intended for high fan-out, time-critical signal nets, or nets
that are distributed over long distances. In XC4000X
devices, quad lines are preferred for critical nets, because
the buffered switch matrices make them faster for high
fan-out nets.
Two horizontal longlines per CLB can be driven by 3-state
or open-drain drivers (TBUFs). They can therefore imple-
ment unidirectional or bidirectional buses, wide multiplex-
ers, or wired-AND functions. (See
page 26
Each horizontal longline driven by TBUFs has either two
(XC4000E) or eight (XC4000X) pull-up resistors. To acti-
vate these resistors, attach a PULLUP symbol to the
long-line net. The software automatically activates the
appropriate number of pull-ups. There is also a weak
keeper at each end of these two horizontal longlines. This
Figure 29: Quad Lines (XC4000X only)
CLB
CLB
CLB
for more details.)
CLB
CLB
CLB
“Three-State Buffers” on
CLB
CLB
CLB
X9014
6-31
6