XC5VSX35T-1FFG665CES Xilinx Inc, XC5VSX35T-1FFG665CES Datasheet - Page 78
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XC5VSX35T-1FFG665CES
Manufacturer Part Number
XC5VSX35T-1FFG665CES
Description
IC FPGA VIRTEX-5 ES 35K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX35T-1FFG665CES
Number Of Logic Elements/cells
34816
Number Of Labs/clbs
2720
Total Ram Bits
3096576
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX35T-1FFG665CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
Table 95: Global Clock Setup and Hold With PLL in Source-Synchronous Mode (Cont’d)
DS202 (v5.3) May 5, 2010
Product Specification
Notes:
1.
2.
3.
T
PSPLL0
Setup and Hold times are measured over worst case conditions (process, voltage, temperature). Setup time is measured relative to the
Global Clock input signal using the slowest process, highest temperature, and lowest voltage. Hold time is measured relative to the Global
Clock input signal using the fastest process, lowest temperature, and highest voltage. These measurements include PLL CLKOUT0 jitter.
IFF = Input Flip-Flop or Latch.
Use IBIS to determine any duty-cycle distortion incurred using various standards.
Symbol
/ T
PHPLL0
No Delay Global Clock and IFF
Source-Synchronous Mode
Description
(2)
with PLL in
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
XC5VTX150T
XC5VTX240T
XC5VFX30T
XC5VFX70T
XC5VFX100T
XC5VFX130T
XC5VFX200T
Device
–0.10
–0.12
–0.18
–0.12
1.40
1.38
1.51
1.66
N/A
N/A
N/A
-3
Speed Grade
–0.31
–0.31
–0.09
–0.10
–0.18
–0.11
–0.12
1.41
1.61
1.46
1.44
1.60
1.76
1.94
-2
–0.29
–0.29
–0.08
–0.09
–0.18
–0.09
–0.10
1.47
1.66
1.55
1.53
1.71
1.92
2.06
-1
Units
ns
ns
ns
ns
ns
ns
ns
78