AT94K40AL-25DQC Atmel, AT94K40AL-25DQC Datasheet - Page 136
![IC FPSLIC 40K GATE 25MHZ 208PQFP](/photos/6/73/67311/313-208-pqfp_sml.jpg)
AT94K40AL-25DQC
Manufacturer Part Number
AT94K40AL-25DQC
Description
IC FPSLIC 40K GATE 25MHZ 208PQFP
Manufacturer
Atmel
Series
FPSLIC®r
Specifications of AT94K40AL-25DQC
Core Type
8-bit AVR
Speed
18MHz
Interface
I²C, UART
Program Sram Bytes
20K-32K
Fpga Sram
18kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
2304
Fpga Gates
40K
Fpga Registers
2862
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
208-MQFP, 208-PQFP
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT94K40AL-25DQC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 136 of 204
- Download datasheet (4Mb)
4.29.5
136
AT94KAL Series FPSLIC
Baud-rate Generator
• Bit 3 - TXEN0/TXEN1: Transmitter Enable
This bit enables the UART transmitter when set (one). When disabling the transmitter while
transmitting a character, the transmitter is not disabled before the character in the shift register
plus any following character in UDRn has been completely transmitted.
• Bit 2 - CHR90/CHR91: 9-bit Characters
When this bit is set (one) transmitted and received characters are 9-bit long plus start and stop
bits. The 9-bit is read and written by using the RXB8n and TXB8n bits in UCSRnB, respectively.
The 9th data bit can be used as an extra stop bit or a parity bit.
• Bit 1 - RXB80/RXB81: Receive Data Bit 8
When CHR9n is set (one), RXB8n is the 9th data bit of the received character.
• Bit 0 - TXB80/TXB81: Transmit Data Bit 8
When CHR9n is set (one), TXB8n is the 9th data bit in the character to be transmitted.
The baud-rate generator is a frequency divider which generates baud-rates according to the fol-
lowing equation
Note:
For standard crystal frequencies, the most commonly used baud-rates can be generated by
using the UBR settings in
than 2% from the target baud-rate, are bold in the table. However, using baud-rates that have
more than 1% error is not recommended. High error ratings give less noise resistance.
• BAUD = Baud-rate
• f
• UBR = Contents of the UBRRHI and UBRRn Registers, (0 - 4095)
CK
= Crystal Clock Frequency
1. This equation is not valid when the UART transmission speed is doubled. See
Transmission” on page 138
(1)
:
Table
2. UBR values which yield an actual baud-rate differing less
BAUD
for a detailed description.
=
--------------------------------- -
16(UBR
f
CK
+
1 )
“Double Speed
1138I–FPSLI–1/08
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