KSZ8692PBI Micrel Inc, KSZ8692PBI Datasheet - Page 5

• Manufacturer Part Number: KSZ8692PBI
• Description: IC ARM9 PHY 10/100MBPS 400-PBGA
• Manufacturer: Micrel Inc

Specifications of KSZ8692PBI

• Applications: Networking & Communications
• Core Processor: ARM9
• Program Memory Type: External Program Memory
• Controller Series: KSZ
• Interface: EBI/EMI, Ethernet, I²C, I²S,PCI, SPI, UART/USART, USB
• Number Of I /o: 20
• Voltage - Supply: 1.235 V ~ 1.365 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Ram Size: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3627; KSZ8692PBI

List of Figures
Figure 1. KSZ8692PB Block Diagram..................................................................................................................................... 2
Figure 2. Peripheral Options and Examples ........................................................................................................................... 6
Figure 3. KSZ8692PB Functional Block Diagram ................................................................................................................... 7
Figure 4. Static Memory Interface Examples .......................................................................................................................... 9
Figure 5. External I/O Interface Examples .............................................................................................................................. 9
Figure 6. 8-bit NAND Interface Examples............................................................................................................................. 10
Figure 7. 16-bit NAND Interface Examples........................................................................................................................... 11
Figure 8. Two 16-bit DDR Memory Devices Interface Example ........................................................................................... 12
Figure 9. Four 8-bit DDR Memory Devices Interface Example............................................................................................. 13
Figure 10. Burst DDR Read Timing ...................................................................................................................................... 14
Figure 11. Burst DDR Write Timing....................................................................................................................................... 14
Figure 12. USB 2.0 Configuration as Two-Port Host ............................................................................................................ 16
Figure 13. USB 2.0 Configuration as Host + Device............................................................................................................. 16
Figure 14. Reset Circuit ........................................................................................................................................................ 21
Figure 15. Power and Clocks ................................................................................................................................................ 21
Figure 16. Reset Timing........................................................................................................................................................ 38
Figure 17. Static Memory Read Cycle .................................................................................................................................. 38
Figure 18. Static Memory Write Cycle .................................................................................................................................. 39
Figure 19. External I/O Read and Write Cycles .................................................................................................................... 39
Figure 21. 400-Pin PBGA...................................................................................................................................................... 42
List of Tables
Table 1. Reset Timing Parameters ..................................................................................................................................... 38
Table 2. Programmable Static Memory Timing Parameters................................................................................................ 39
Table 3. External I/O Memory Timing Parameters................................................................................................................ 40
Table 4. Programmable External I/O Timing Parameters.................................................................................................... 40
Micrel, Inc.
March 2010
5
M9999-031810-4.0
KSZ8692PB