Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 84
Z84C0010PEG
Manufacturer Part Number
Z84C0010PEG
Description
IC 10MHZ Z80 CMOS CPU 40-DIP
Manufacturer
Zilog
Series
Z80r
Specifications of Z84C0010PEG
Processor Type
Z80
Features
Enhanced Z80 Microprocessor/CPU
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Operating Temperature Range
-40°C To +100°C
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
100°C
Rohs Compliant
Yes
Processor Series
Z84C0xx
Core
Z80
Data Bus Width
8 bit
Program Memory Size
64 KB
Maximum Clock Frequency
10 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Base Number
84
Clock Frequency
10MHz
Frequency Typ
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3898
Z84C0010PEG
Z84C0010PEG
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64
UM008005-0205
Z80 CPU
User’s Manual
conditions, or data packed into memory locations, making memory
utilization more efficient.
The Z80 can set, reset, or test any bit in the accumulator, any general-
purpose register or any memory location with a single instruction.
Table 15 lists the 240 instructions that are available for this purpose.
Register addressing can specify the accumulator or any general-purpose
register on which the operation is to be performed. Register indirect and
indexed addressing are available to operate on external memory locations.
Bit test operations set the Zero flag (Z) if the tested bit is a zero.
Jump, Call, and Return
Table 16 lists all the jump, call, and return instructions implemented in the
Z80 CPU. A jump is a branch in a program where the program counter is
loaded with the 16-bit value as specified by one of the three available
addressing modes (Immediate Extended, Relative, or Register Indirect).
Notice that the jump group has several conditions that can be specified
before the jump is made. If these conditions are not met, the program
merely continues with the next sequential instruction. The conditions are
all dependent on the data in the flag register. The immediate extended
addressing is used to jump to any location in the memory. This instruction
requires three bytes (two to specify the 16-bit address) with the low order
address byte first, followed by the high order address byte.
For example, an unconditional jump to memory location
The relative jump instruction uses only two bytes, the second byte is a
signed two’s complement displacement from the existing PC. This
displacement can be in the range of +129 to -126 and is measured from
the address of the instruction Op Code.
Address A
A+1
A+2
C3
32
3E
Op Code
Low Order Address
High Order Address
Z80 CPU Instruction Description
3E32H
is:
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