Z8018008VSG Zilog, Z8018008VSG Datasheet - Page 58

• Manufacturer Part Number: Z8018008VSG
• Description: IC 8MHZ Z180 CMOS ENH MPU 68PLCC
• Manufacturer: Zilog

Specifications of Z8018008VSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3886; Z8018008VSG

Timer Data Register
Timer Data Register
PS014004-1106
Timer Data Register Channel 1L
Timer Data Register Channel 1H
Break Detect (bit 1)—The receiver sets this
character with a Framing Error becomes the oldest character in the
cleared when software writes a
IOSTOP
Send Break (bit 0)—If this bit and bit
to send a break condition. The duration of the break is under software control (one of the
PRTs
serial output of the transmitter.
Mnemonic TMDR1L:14H
Mnemonic TMDR1H: 15H
or
CTCs
mode, and for
can be used to time it). This bit resets to
Figure 43. Timer Data Register Channel 1L
Figure 44. Timer Data Register Channel 1H
7
7
6
6
ASCIO
5
5
if the
0
4
4
to the
DCD0
3
3
Timer Data
Timer Data
EFR
2
are both
pin is auto-enabled and is negated (High).
2
2
bit in
READ-ONLY
1
1
CNTLA
1
, the transmitter holds the
0
0
0
, in which state
register, also by
bit to
1
RxFIFO
Microprocessor Unit
when an all-zero
TXA
. The bit is
RESET
carries the
TXA
Architecture
, by
pin Low
Z80180
52