MPC855TVR50D4 Freescale Semiconductor, MPC855TVR50D4 Datasheet - Page 16

• Manufacturer Part Number: MPC855TVR50D4
• Description: IC MPU POWERQUICC 50MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC Ir

Specifications of MPC855TVR50D4

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 8KB
• Cpu Speed: 50MHz
• Embedded Interface Type: Ethernet, I2C, SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 357
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bus Signal Timing
16
B11a
B12a
B13a
B16a
B16b
B17a
B22a
B22b
Num
B22c
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B9
CLKOUT to A(0:31), BADDR(28:30),
RD/WR, BURST, D(0:31), DP(0:3),
TSIZ(0:1), REG, RSV, AT(0:3), PTR High-Z
CLKOUT to TS, BB assertion
CLKOUT to TA, BI assertion (when driven by
the memory controller or PCMCIA interface)
CLKOUT to TS, BB negation
CLKOUT to TA, BI negation (when driven by
the memory controller or PCMCIA interface)
CLKOUT to TS, BB High-Z
CLKOUT to TA, BI High-Z (when driven by
the memory controller or PCMCIA interface)
CLKOUT to TEA assertion
CLKOUT to TEA High-Z
TA, BI valid to CLKOUT (setup time)
TEA, KR, RETRY, CR valid to CLKOUT
(setup time)
BB, BG, BR, valid to CLKOUT (setup time)
CLKOUT to TA, TEA, BI, BB, BG, BR valid
(hold time)
CLKOUT to KR, RETRY, CR valid (hold
time)
D(0:31), DP(0:3) valid to CLKOUT rising
edge (setup time)
CLKOUT rising edge to D(0:31), DP(0:3)
valid (hold time)
D(0:31), DP(0:3) valid to CLKOUT falling
edge (setup time)
CLKOUT falling edge to D(0:31), DP(0:3)
valid (hold time)
CLKOUT rising edge to CS asserted GPCM
ACS = 00
CLKOUT falling edge to CS asserted GPCM
ACS = 10, TRLX = 0
CLKOUT falling edge to CS asserted GPCM
ACS = 11, TRLX = 0, EBDF = 0
CLKOUT falling edge to CS asserted GPCM
ACS = 11, TRLX = 0, EBDF = 1
Characteristic
6
7
6
7
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Table 7. Bus Operation Timings (continued)
5
10.00
10.86
7.58
7.58
2.50
7.58
2.50
7.58
2.50
2.50
2.50
9.75
8.50
1.00
2.00
6.00
1.00
4.00
2.00
7.58
7.58
Min
—
33 MHz
14.33
13.58
14.33
11.00
21.58
15.00
10.00
15.00
14.33
14.33
17.99
Max
9.25
8.00
—
—
—
—
—
—
—
—
—
10.00
6.25
6.25
2.50
6.25
2.50
6.25
2.50
2.50
2.50
9.75
8.50
1.00
2.00
6.00
1.00
4.00
2.00
6.25
6.25
8.88
Min
—
40 MHz
13.00
12.25
13.00
11.00
20.25
15.00
10.00
15.00
13.00
13.00
16.00
Max
9.25
8.00
—
—
—
—
—
—
—
—
—
10.00
5.00
5.00
2.50
5.00
2.50
5.00
2.50
2.50
2.50
9.75
8.50
1.00
2.00
6.00
1.00
4.00
2.00
5.00
5.00
7.00
Min
—
50 MHz
11.75
11.00
11.75
11.00
19.00
15.00
10.00
15.00
11.75
11.75
14.13
Max
9.25
8.00
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
3.80
3.80
2.50
3.80
2.50
3.80
2.50
2.50
2.50
6.00
4.50
4.00
2.00
2.00
6.00
2.00
4.00
2.00
3.80
3.80
5.18
Min
—
66 MHz
10.04
11.29
14.04
15.00
15.00
10.04
10.54
12.31
Max
9.75
8.54
9.00
9.00
8.00
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns