MPC8248VRPIEA Freescale Semiconductor, MPC8248VRPIEA Datasheet - Page 30

• Manufacturer Part Number: MPC8248VRPIEA
• Description: IC MPU POWERQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of MPC8248VRPIEA

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 300MHz
• Voltage: 1.5V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: 603e
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 300 MHz
• Operating Supply Voltage: 1.4 V to 1.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 4 KB
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 14
• Program Memory Size: 16 KB
• Program Memory Type: EEPROM
• Core Size: 32 Bit
• Cpu Speed: 300MHz
• Embedded Interface Type: I2C, JTAG, SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 516
• Rohs Compliant: Yes
• For Use With: CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Clock Configuration Modes
30
1
2
3
4
5
6
MODCK[1-3]
MODCK[1-3]
MODCK_H-
MODCK_H-
table entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose
of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not
exceed the frequency rating of the user’s device. The minimum CPU frequency is 150 MHz for commercial
temperature devices and 175 MHz for extended temperature devices. The minimum CPM frequency is 120 MHz.
MODCK[1-3] = three hardware configuration pins.
SCCR[PCIDF] as follows:
CPM_CLK/PCI_CLK = (PCIDF + 1) / 2.
The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a
PCI_MODCK determines the PCI clock frequency range. Refer to
MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the MPC8260 User’s Manual ).
CPM multiplication factor = CPM clock/bus clock
CPU multiplication factor = Core PLL multiplication factor
CPM_CLK/PCI_CLK ratio. When PCI_MODCK = 0, the ratio of CPM_CLK/PCI_CLK should be calculated from
1100_000
1100_001
1100_010
0000_000
0000_001
0000_010
0000_011
0000_100
0000_101
0000_110
0000_111
0001_000
0001_001
Mode
Mode
Table 16. Clock Configurations for PCI Host Mode (PCI_MODCK=0)
3
3
Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=1)
Low
Low
60.0 100.0
50.0 100.0
60.0 120.0
60.0 120.0
60.0 120.0
50.0 100.0
50.0 100.0
50.0 100.0
50.0 100.0
50.0 100.0
Bus Clock
Bus Clock
(MHz)
(MHz)
MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 2
High
High
Multiplication
Multiplication
Factor
Factor
CPM
CPM
2.5
2.5
2.5
2
2
3
3
3
3
3
Default Modes (MODCK_H=0000)
4
4
Full Configuration Modes
120.0 200.0
100.0 200.0
150.0 300.0
150.0 300.0
150.0 300.0
150.0 300.0
150.0 300.0
150.0 300.0
150.0 300.0
150.0 300.0
CPM Clock
Low
CPM Clock
Low
(MHz)
(MHz)
High
High
Reserved
Reserved
Reserved
Multiplication
Multiplication
Factor
Factor
CPU
CPU
2.5
3.5
3.5
Table 17
3
3
4
3
4
5
6
5
5
for lower range configurations.
150.0 250.0
150.0 300.0
180.0 360.0
210.0 420.0
240.0 480.0
150.0 300.0
175.0 350.0
200.0 400.0
250.0 500.0
300.0 600.0
CPU Clock
Low
CPU Clock
Low
(MHz)
(MHz)
High
High
1, 2
Division
Division
Factor
Factor
(continued)
PCI
PCI
Freescale Semiconductor
4
4
6
6
6
6
6
6
6
6
1, 2
6
6
Low
Low
30.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
PCI Clock
PCI Clock
(MHz)
(MHz)
High
High
50.0
50.0
50.0
50.0
50.0
50.0
50.0
50.0
50.0
50.0