MPC8245LVV333D Freescale Semiconductor, MPC8245LVV333D Datasheet - Page 49

IC MPU 32BIT 333MHZ PPC 352-TBGA

MPC8245LVV333D

Manufacturer Part Number
MPC8245LVV333D
Description
IC MPU 32BIT 333MHZ PPC 352-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheets

Specifications of MPC8245LVV333D

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
333MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
352-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
333 MHz
Operating Supply Voltage
2 V, 2.1 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
333MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
TBGA
No. Of Pins
352
Supply Voltage Range
1.9V To 2.2V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
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Note:
1
2
3
4
5
6
7
8
QACK is an output and is not required at the COP header for emulation.
RUN/STOP normally found on pin 5 of the COP header is not implemented on the MPC8245. Connect pin 5 of the COP
header to OV
CKSTP_OUT normally on pin 15 of the COP header is not implemented on the MPC8245. Connect pin 15 of the COP
header to OV
Pin 14 is not physically present on the COP header.
SRESET functions as output SDMA12 in extended ROM mode.
CHKSTOP_IN functions as output SDMA14 in extended ROM mode.
The COP port and target board should be able to independently assert HRESET and TRST to the processor to control
the processor as shown.
If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP header through
an AND gate to TRST of the part. If the JTAG interface is not implemented, connect HRESET from the target source to
TRST of the part through a 0-Ω isolation resistor.
Physical Pin Out
COP Connector
DD
DD
11
13
15
1
3
5
7
9
No pin
with a 1-kΩ pull-up resistor.
with a 10-kΩ pull-up resistor.
KEY
Board Sources
10
12
16
2
4
6
8
From Target
MPC8245 Integrated Processor Hardware Specifications, Rev. 10
(if any)
Key
15
14
SRESET
HRESET
Figure 26. COP Connector Diagram
5
13
11
10
12
16
4
6
2
2
3
4
1
3
7
8
9
VDD_SENSE
TDO
SRESET
COP_TRST
TMS
TDI
TCK
COP_HRESET
CHKSTOP_IN
NC
NC
NC
5
7
5
6
10 kΩ
1 kΩ
0 Ω
8
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
OV
OV
OV
OV
TDO
OV
OV
CHKSTOP_IN
TMS
TDI
TCK
HRST_CPU
HRST_CTRL
OV
OV
TRST
QACK
SRESET
MPC8245
DD
DD
DD
DD
DD
DD
DD
DD
7
1
5
6
System Design
49

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