Z8018006VSC00TR Zilog, Z8018006VSC00TR Datasheet - Page 60
Z8018006VSC00TR
Manufacturer Part Number
Z8018006VSC00TR
Description
IC Z180 MPU 68PLCC
Manufacturer
Zilog
Datasheet
1.Z8018006PSG.pdf
(85 pages)
Specifications of Z8018006VSC00TR
Processor Type
Z180
Speed
6MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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Timer Data Register
DMA Source Address Register Channel 0
Timer Data Register
PS014004-1106
Free Running Counter I/O Address = 18H
DMA Source Address Register, Channel 0L
Mnemonic FRC: 18H
If data is written into the free running counter, the interval of DRAM refresh cycle and baud
rates for the ASCI and CSI/O are not guaranteed. In IOSTOP mode, the free running counter
continues counting down. It is initialized to FFH, during RESET.
(
transfers. The register contains 20 bits and can specify up to 1024 KB memory addresses or
up to 64 KB I/O addresses. Channel 0 source can be memory, I/O, or memory mapped I/O.
For I/O, the most significant bits of this register identify the
signal.
Mnemonic SAR0L: Address 20h
SAR0: I/O ADDRESS = 20h to 22h
—
7
7
—
Figure 47. Timer Data Register
6
6
Figure 48. DMA Channel 0L
—
5
5
—
—
4
4
) specifies the physical source address for channel 0
DMA Channel 0 Address
—
3
3
Counting Data
—
2
2
—
1
1
—
0
0
REQUEST HANDSHAKE
Microprocessor Unit
Architecture
Z80180
54
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