Z8S18010FSC00TR Zilog, Z8S18010FSC00TR Datasheet - Page 54

IC Z180 MPU 80QFP

Z8S18010FSC00TR

Manufacturer Part Number
Z8S18010FSC00TR
Description
IC Z180 MPU 80QFP
Manufacturer
Zilog
Datasheet

Specifications of Z8S18010FSC00TR

Processor Type
Z180
Speed
10MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
80-BQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Part Number:
Z8S18010FSC00TR
Manufacturer:
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Quantity:
10 000
The DMA Destination Address Register Channel 0
specifies the physical destination address for channel 0
transfers. The register contains 20 bits and can specify up
to 1024-KB memory addresses or up to 64-KB I/O
addresses. Channel 0 destination can be memory, I/O, or
memory mapped I/O. For I/O, the
identify the Request Handshake signal for channel 0.
bits of this register
If the DMA destination is in I/O space, bits
ister select the DMA request signal for DMA0, as follows:
of this reg-
ZiLOG

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