EZ80190AZ050EG Zilog, EZ80190AZ050EG Datasheet - Page 45
![IC WEBSERVER 50MHZ XTEMP 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80190AZ050EG
Manufacturer Part Number
EZ80190AZ050EG
Description
IC WEBSERVER 50MHZ XTEMP 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050EG
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80190x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3865
EZ80190AZ050EG
EZ80190AZ050EG
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EZ80190AZ050EG
Manufacturer:
TYCO
Quantity:
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Company:
Part Number:
EZ80190AZ050EG
Manufacturer:
Zilog
Quantity:
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PS006614-1208
Timer Control Registers
Table 5. Timer Control Register
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit
Position
7
PRT_IRQ
6
IRQ_EN
5
4
PRT_MODE
[3:2]
CLK_DIV
The Timer Control register can be read or written to. The timer reload registers are Write
Only and are located at the same I/O address as the timer data registers, which are Read
Only.
The Timer Control registers, listed in
including enabling the timer, selecting the clock divider, enabling the interrupt, selecting
between CONTINUOUS and SINGLE PASS modes, and enabling the automatic reload
feature.
0086h, TMR3_CTL = 0089h, TMR4_CTL = 008Ch, TMR5_CTL = 008Fh)
Value
0
1
0
1
0
0
1
00
01
10
11
Description
The timer has not reached its end-of-count value. This bit is
reset to 0 every time the TMRx_CTL register is read.
The timer has reached its end-of-count value. If IRQ_EN is set to
1, an interrupt signal is sent to the CPU. This bit remains 1 until
the TMRx_CTL register is read.
Timer interrupt requests are disabled.
Timer interrupt requests are enabled.
Reserved
The timer operates in SINGLE PASS mode. PRT_EN (bit 0) is
reset to 0, and counting stops when the end-of-count value is
reached.
The timer operates in CONTINUOUS mode. The timer reload
value is written to the counter when the end-of-count value is
reached.
Clock ÷ 2 is the timer input source.
Clock ÷ 4 is the timer input source.
Clock ÷ 8 is the timer input source.
Clock ÷ 16 is the timer input source.
R
7
0
R/W
6
0
(TMR0_CTL = 0080h, TMR1_CTL = 0083h, TMR2_CTL =
R/W
5
0
Table
R/W
5, are used to control operation of the timer,
4
0
R/W
3
0
R/W
2
0
Programmable Reload Timers
Product Specification
R/W
1
0
R/W
0
0
eZ80190
35
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