Z8018233ASC1838TR Zilog, Z8018233ASC1838TR Datasheet - Page 32
Z8018233ASC1838TR
Manufacturer Part Number
Z8018233ASC1838TR
Description
IC Z180 MPU 100VQFP
Manufacturer
Zilog
Datasheet
1.Z8018233FSG.pdf
(109 pages)
Specifications of Z8018233ASC1838TR
Processor Type
Z180
Features
Smart Peripheral Controller
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Manufacturer
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ASCI CHANNELS CONTROL REGISTERS (Continued)
Note:
* Baud rate is external clock rate 16; therefore, Ø (40 x 16)
3-32
Divide Ratio
SS, 2, 1, 0
is maximum baud rate using external clocking.
General
*111
000
001
010
011
100
101
110
Upon Reset
R/W
Bit
CNTLB1
MPBT
Invalid
R/W
(Divide Ratio = 10)
Ø
Ø
Ø
Ø
Ø
Ø
Ø
External Clock (Frequency < Ø
DR = 0 (x16)
MP
R/W
160
320
640
1280
2560
5120
10240
PS = 0
0
/CTS/
R/W
PS
Figure 12. ASCI Control Register B (Ch. 1)
0
PE0
R/W
0
PS009801-0301
P R E L I M I N A R Y
DR
R/W
0
DR = 1 (x64)
Ø
Ø
Ø
Ø
Ø
Ø
Ø
SS2
R/W
1
640
1280
2580
5120
10240
20480
40960
40)
SS1
R/W
1
Addr 03H
SS0
R/W
1
(Divide Ratio = 30)
Ø
Ø
Ø
Ø
Ø
Ø
Ø
Clock Source and Speed Select
Divide Ratio
Parity Even or Odd
Read - Status of /CTS pin
Write - Select PS
Multiprocessor
Multiprocessor Bit Transmit
DR = 0 (x16)
480
960
1920
3840
7680
15360
30720
PS = 1
Z
ILOG
I
NTELLIGENT
DR = 1 (x64)
Ø
Ø
Ø
Ø
Ø
Ø
Ø
DS971820600
Z80182/Z8L182
1920
3840
7680
15360
30720
61440
122880
P
ERIPHERAL
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