MPC852TVR66A Freescale Semiconductor, MPC852TVR66A Datasheet - Page 53

• Manufacturer Part Number: MPC852TVR66A
• Description: IC MPU POWERQUICC 66MHZ 256PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC852TVR66A

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 66MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC852TADS-KIT
• Maximum Clock Frequency: 66 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 8 KB
• I/o Voltage: 3.3 V
• Interface Type: SPI, UART
• Minimum Operating Temperature: 0 C
• Program Memory Size: 4 KB
• Program Memory Type: EPROM/Flash
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.9/3.465V
• Operating Supply Voltage (min): 1.7/3.135V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
(Output)
RSTRT
RCLK3
(Input)
TENA(RTS3)
RxD3
Notes:
RENA(CD3)
1.
2.
REJECT
(Output)
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, the CSL bit is set in the
buffer descriptor at the end of the frame transmission.
TCLK3
(Note 2)
(Input)
TxD3
(Input)
0
128
Figure 53. CAM Interface Receive Start Timing Diagram
133
MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
131
Figure 54. CAM Interface REJECT Timing Diagram
Figure 52. Ethernet Transmit Timing Diagram
Start Frame De-
1
128
1
137
121
BIT1
125
132
129
BIT2
136
CPM Electrical Characteristics
134
53